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DAC70504RTER
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Texas Instruments Digital To Analog Converters (DAC), WQFN-16-EP(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+54@@ -0,0 +1,54 @@+# DAC70504RTER++**Texas Instruments** · Digital To Analog Converters (DAC) · WQFN-16-EP(3x3)++DAC70504RTER from Texas Instruments, in a WQFN-16-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | REF | bidirectional | When using the internal reference this is the reference output voltage pin (default); when using an external reference it is the reference input pin to the device. |+| 2 | OUT0 | output | Analog output voltage from DAC 0. |+| 3 | OUT1 | output | Analog output voltage from DAC 1. |+| 4 | OUT2 | output | Analog output voltage from DAC 2. |+| 5 | OUT3 | output | Analog output voltage from DAC 3. |+| 6 | GND | power_in | Ground reference point for all circuitry on the device. |+| 7 | VDD | power_in | Analog supply voltage, 2.7 V to 5.5 V. |+| 8 | GAIN | input | Sets the initial buffer amplifier gain for all four channels at power-up or reset: tied to GND gives gain 1, tied to VIO gives gain 2; changing it after power-up does not affect operation. |+| 9 | RSTSEL | input | Reset select: when tied to GND all four DACs reset to zero scale, and when connected to VIO all four DACs reset to midscale. |+| 10 | REFDIV | input | Sets the reference divider at power-up or reset: tied to GND the reference is not divided, tied to VIO the reference is divided by 2; changing it after power-up does not affect operation. |+| 11 | LDAC | input | A high-to-low transition updates the DAC outputs of channels configured in synchronous mode simultaneously, and the pin can be tied permanently to GND. |+| 12 | CS | input | Active-low serial data enable and frame synchronization signal; when it goes low it enables the serial interface input shift register. |+| 13 | SCLK | input | Serial interface clock. |+| 14 | SDI | input | Serial interface data input, clocked into the input shift register on each falling edge of SCLK. |+| 15 | SDO/ALARM | output | Serial data output by default, high impedance when CS is high; alternatively configurable as an open-drain ALARM output for CRC or reference alarm events, which requires a 10 kΩ pull-up to VIO. |+| 16 | VIO | power_in | IO supply voltage, 1.7 V to 5.5 V, setting the I/O operating voltage for the serial interface. |+| 17 | Thermal Pad | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | WQFN-16-EP(3x3) |+| Category | Data Acquisition |+| Pins | 17 |++## CAD (KiCad official)++- Symbol: `DAC70504RTER`+- Footprint: `Package_DFN_QFN:QFN-16-1EP_3x3mm_P0.5mm_EP1.7x1.7mm`+- 3D model: WQFN-16-EP(3x3) (KiCad packages3D, STEP)+- 3D model files: `dac70504rter-etched.step` / `dac70504rter-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `dac70504rter.step` / `dac70504rter.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/dac80504) (50 pp, sha256 `7393a92988cc5109`, retrieved 2026-10-08, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/dac70504rter-datasheet.pdf)
page.jsonadded+255@@ -0,0 +1,255 @@+{+ "slug": "dac70504rter",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments Digital To Analog Converters (DAC), WQFN-16-EP(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "data acquisition",+ "dac70504rter",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "dac70504rter.kicad_sym",+ "dac70504rter.kicad_mod",+ "dac70504rter.glb",+ "dac70504rter.step",+ "dac70504rter.lbr",+ "docs/hero.png",+ "docs/dac70504rter-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "dac70504rter-hero.glb",+ "dac70504rter-hero.overlay.json"+ ],+ "component": {+ "mpn": "DAC70504RTER",+ "manufacturer": "Texas Instruments",+ "package": "WQFN-16-EP(3x3)",+ "pin_count": 17,+ "category": "Data Acquisition",+ "subcategory": "Digital To Analog Converters (DAC)",+ "datasheet": "https://www.ti.com/cn/lit/gpn/dac80504",+ "parts": {+ "symbol": "dac70504rter.kicad_sym",+ "footprint": "dac70504rter.kicad_mod",+ "model_3d": "dac70504rter-hero.glb",+ "model_3d_plain": "dac70504rter.glb",+ "model_3d_step": "dac70504rter-etched.step",+ "model_3d_step_plain": "dac70504rter.step",+ "lbr": "dac70504rter.lbr"+ },+ "distributor_links": {+ "lcsc": "C2680185",+ "digikey": "296-51038-2-ND",+ "mouser": "595-DAC70504RTER"+ },+ "distributor_check": {+ "checked_at": "2026-10-08T19:35:13Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "296-51038-2-ND",+ "status": "found",+ "lifecycle": "Active"+ },+ "mouser": {+ "pn": "595-DAC70504RTER",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "REF",+ "type": "bidirectional",+ "description": "When using the internal reference this is the reference output voltage pin (default); when using an external reference it is the reference input pin to the device."+ },+ {+ "number": "2",+ "name": "OUT0",+ "type": "output",+ "description": "Analog output voltage from DAC 0."+ },+ {+ "number": "3",+ "name": "OUT1",+ "type": "output",+ "description": "Analog output voltage from DAC 1."+ },+ {+ "number": "4",+ "name": "OUT2",+ "type": "output",+ "description": "Analog output voltage from DAC 2."+ },+ {+ "number": "5",+ "name": "OUT3",+ "type": "output",+ "description": "Analog output voltage from DAC 3."+ },+ {+ "number": "6",+ "name": "GND",+ "type": "power_in",+ "description": "Ground reference point for all circuitry on the device."+ },+ {+ "number": "7",+ "name": "VDD",+ "type": "power_in",+ "description": "Analog supply voltage, 2.7 V to 5.5 V."+ },+ {+ "number": "8",+ "name": "GAIN",+ "type": "input",+ "description": "Sets the initial buffer amplifier gain for all four channels at power-up or reset: tied to GND gives gain 1, tied to VIO gives gain 2; changing it after power-up does not affect operation."+ },+ {+ "number": "9",+ "name": "RSTSEL",+ "type": "input",+ "description": "Reset select: when tied to GND all four DACs reset to zero scale, and when connected to VIO all four DACs reset to midscale."+ },+ {+ "number": "10",+ "name": "REFDIV",+ "type": "input",+ "description": "Sets the reference divider at power-up or reset: tied to GND the reference is not divided, tied to VIO the reference is divided by 2; changing it after power-up does not affect operation."+ },+ {+ "number": "11",+ "name": "LDAC",+ "type": "input",+ "description": "A high-to-low transition updates the DAC outputs of channels configured in synchronous mode simultaneously, and the pin can be tied permanently to GND."+ },+ {+ "number": "12",+ "name": "CS",+ "type": "input",+ "description": "Active-low serial data enable and frame synchronization signal; when it goes low it enables the serial interface input shift register."+ },+ {+ "number": "13",+ "name": "SCLK",+ "type": "input",+ "description": "Serial interface clock."+ },+ {+ "number": "14",+ "name": "SDI",+ "type": "input",+ "description": "Serial interface data input, clocked into the input shift register on each falling edge of SCLK."+ },+ {+ "number": "15",+ "name": "SDO/ALARM",+ "type": "output",+ "description": "Serial data output by default, high impedance when CS is high; alternatively configurable as an open-drain ALARM output for CRC or reference alarm events, which requires a 10 kΩ pull-up to VIO."+ },+ {+ "number": "16",+ "name": "VIO",+ "type": "power_in",+ "description": "IO supply voltage, 1.7 V to 5.5 V, setting the I/O operating voltage for the serial interface."+ },+ {+ "number": "17",+ "name": "Thermal Pad",+ "type": "passive",+ "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: The thermal pad on the bottom of the WQFN package is listed in the datasheet pin table as '–' with n; Pin 15 is typed as output (serial data output). The datasheet also allows it to be configured as an ; The pinout is taken from the RTE 16-pin WQFN pin table on datasheet page 5. The same table is shared",+ "exposed pad 17 added from the footprint"+ ],+ "pages_sent": 10,+ "cost_usd": 0.0694,+ "at": "2026-10-08T19:34:21"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/dac80504",+ "pages": 50,+ "sha256": "7393a92988cc5109",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 17,+ "described": 17,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "dac70504rter.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 3,+ 3,+ 0.785+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "3eb81ffac423a66cdcfead8efe56401da171edaf1f2257049aad7b2d3900f6c8",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "dac70504rter-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 3,+ 3,+ 0.785+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "b6397da8796fb95d136a6b6173ffabe726104566a46d47fc285d3a43bedbc9df",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}