component
DAC70504RTER
Public Made by Adomby adom
Texas Instruments Digital To Analog Converters (DAC), WQFN-16-EP(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownDAC70504RTER
Texas Instruments · Digital To Analog Converters (DAC) · WQFN-16-EP(3x3)
DAC70504RTER from Texas Instruments, in a WQFN-16-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | REF | bidirectional | When using the internal reference this is the reference output voltage pin (default); when using an external reference it is the reference input pin to the device. |
| 2 | OUT0 | output | Analog output voltage from DAC 0. |
| 3 | OUT1 | output | Analog output voltage from DAC 1. |
| 4 | OUT2 | output | Analog output voltage from DAC 2. |
| 5 | OUT3 | output | Analog output voltage from DAC 3. |
| 6 | GND | power_in | Ground reference point for all circuitry on the device. |
| 7 | VDD | power_in | Analog supply voltage, 2.7 V to 5.5 V. |
| 8 | GAIN | input | Sets the initial buffer amplifier gain for all four channels at power-up or reset: tied to GND gives gain 1, tied to VIO gives gain 2; changing it after power-up does not affect operation. |
| 9 | RSTSEL | input | Reset select: when tied to GND all four DACs reset to zero scale, and when connected to VIO all four DACs reset to midscale. |
| 10 | REFDIV | input | Sets the reference divider at power-up or reset: tied to GND the reference is not divided, tied to VIO the reference is divided by 2; changing it after power-up does not affect operation. |
| 11 | LDAC | input | A high-to-low transition updates the DAC outputs of channels configured in synchronous mode simultaneously, and the pin can be tied permanently to GND. |
| 12 | CS | input | Active-low serial data enable and frame synchronization signal; when it goes low it enables the serial interface input shift register. |
| 13 | SCLK | input | Serial interface clock. |
| 14 | SDI | input | Serial interface data input, clocked into the input shift register on each falling edge of SCLK. |
| 15 | SDO/ALARM | output | Serial data output by default, high impedance when CS is high; alternatively configurable as an open-drain ALARM output for CRC or reference alarm events, which requires a 10 kΩ pull-up to VIO. |
| 16 | VIO | power_in | IO supply voltage, 1.7 V to 5.5 V, setting the I/O operating voltage for the serial interface. |
| 17 | Thermal Pad | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | WQFN-16-EP(3x3) |
| Category | Data Acquisition |
| Pins | 17 |
CAD (KiCad official)
- Symbol:
DAC70504RTER - Footprint:
Package_DFN_QFN:QFN-16-1EP_3x3mm_P0.5mm_EP1.7x1.7mm - 3D model: WQFN-16-EP(3x3) (KiCad packages3D, STEP)
- 3D model files:
dac70504rter-etched.step/dac70504rter-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);dac70504rter.step/dac70504rter.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (50 pp, sha256
7393a92988cc5109, retrieved 2026-10-08, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).