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DAC70501ZDGSR
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Texas Instruments Digital To Analog Converters (DAC), VSSOP-10-0.5mm. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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DAC70501ZDGSR
Texas Instruments · Digital To Analog Converters (DAC) · VSSOP-10-0.5mm
DAC70501ZDGSR from Texas Instruments, in a VSSOP-10-0.5mm. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD | power_in | Analog supply voltage, 2.7 V to 5.5 V (VDD to AGND absolute maximum is -0.3 V to 6 V). |
| 2 | VOUT | output | Analog output voltage from the DAC, limited to -0.3 V to VDD + 0.3 V with respect to AGND. |
| 3 | NC | unconnected | No connection; leave floating. |
| 4 | AGND | power_in | Ground reference point for all circuitry on the device. |
| 5 | SPI2C | input | Interface select: SPI mode when low (0), I2C mode when high (1); must be kept static after the device powers up. |
| 6 | SCLK/SCL | input | Serial interface clock in SPI mode (data clocked on the SCLK edges) and I2C clock in I2C mode. |
| 7 | SYNC/A0 | input | In SPI mode, active-low frame sync that enables the serial input shift register when low; in I2C mode, four-state address input 0. |
| 8 | SDIN/SDA | bidirectional | In SPI mode, serial data input clocked on each falling edge of SCLK; in I2C mode, bidirectional SDA data line that must be pulled up to the supply with an external resistor. |
| 9 | NC | unconnected | No connection; leave floating. |
| 10 | VREFIO | bidirectional | With the internal reference (default) this pin is the reference output; with an external reference it is the reference input, with allowed voltage set by VDD and the REF-DIV bit. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VSSOP-10-0.5mm |
| Category | Data Acquisition |
| Pins | 10 |
CAD (KiCad official)
- Symbol:
DAC70501ZDGSR - Footprint:
Package_SO:MSOP-10_3x3mm_P0.5mm - 3D model: VSSOP-10-0.5mm (KiCad packages3D, STEP)
- 3D model files:
dac70501zdgsr-etched.step/dac70501zdgsr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);dac70501zdgsr.step/dac70501zdgsr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (53 pp, sha256
f3e447e0d3923a2b, retrieved 2026-10-12, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# DAC70501ZDGSR
**Texas Instruments** · Digital To Analog Converters (DAC) · VSSOP-10-0.5mm
DAC70501ZDGSR from Texas Instruments, in a VSSOP-10-0.5mm. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD | power_in | Analog supply voltage, 2.7 V to 5.5 V (VDD to AGND absolute maximum is -0.3 V to 6 V). |
| 2 | VOUT | output | Analog output voltage from the DAC, limited to -0.3 V to VDD + 0.3 V with respect to AGND. |
| 3 | NC | unconnected | No connection; leave floating. |
| 4 | AGND | power_in | Ground reference point for all circuitry on the device. |
| 5 | SPI2C | input | Interface select: SPI mode when low (0), I2C mode when high (1); must be kept static after the device powers up. |
| 6 | SCLK/SCL | input | Serial interface clock in SPI mode (data clocked on the SCLK edges) and I2C clock in I2C mode. |
| 7 | SYNC/A0 | input | In SPI mode, active-low frame sync that enables the serial input shift register when low; in I2C mode, four-state address input 0. |
| 8 | SDIN/SDA | bidirectional | In SPI mode, serial data input clocked on each falling edge of SCLK; in I2C mode, bidirectional SDA data line that must be pulled up to the supply with an external resistor. |
| 9 | NC | unconnected | No connection; leave floating. |
| 10 | VREFIO | bidirectional | With the internal reference (default) this pin is the reference output; with an external reference it is the reference input, with allowed voltage set by VDD and the REF-DIV bit. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VSSOP-10-0.5mm |
| Category | Data Acquisition |
| Pins | 10 |
## CAD (KiCad official)
- Symbol: `DAC70501ZDGSR`
- Footprint: `Package_SO:MSOP-10_3x3mm_P0.5mm`
- 3D model: VSSOP-10-0.5mm (KiCad packages3D, STEP)
- 3D model files: `dac70501zdgsr-etched.step` / `dac70501zdgsr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `dac70501zdgsr.step` / `dac70501zdgsr.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/dac60501) (53 pp, sha256 `f3e447e0d3923a2b`, retrieved 2026-10-12, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/dac70501zdgsr-datasheet.pdf)