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Contents

README

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DAC63204RTER

Texas Instruments · Digital To Analog Converters (DAC) · WQFN-16(3x3)

DAC63204RTER from Texas Instruments, in a WQFN-16(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 FB3 input Channel 3 voltage feedback input; connect to OUT3 in voltage mode, leave unconnected in current mode to minimize leakage current.
2 OUT3 output DAC channel 3 analog output voltage or current depending on programmed configuration.
3 OUT2 output DAC channel 2 analog output voltage or current depending on programmed configuration.
4 FB2 input Channel 2 voltage feedback input; connect to OUT2 in voltage mode, leave unconnected in current mode to minimize leakage current.
5 GPIO/SDO bidirectional General purpose input/output configurable as LDAC, PD, PROTECT, RESET, SDO or STATUS; requires external pull-up resistor for output functions; requires pull to VDD or AGND when unused.
6 SCL/SYNC tri_state I2C serial clock input (open-drain) or SPI chip select input; requires external pull-up resistor; can be pulled high before VDD rises.
7 A0/SDI input I2C address configuration input or SPI serial data input; connect to VDD, AGND, SDA or SCL for I2C address selection; no pull-up/pull-down required for SPI.
8 SDA/SCLK bidirectional I2C bidirectional serial data line (open-drain) or SPI serial clock input; requires external pull-up resistor for I2C mode; can be pulled high before VDD rises.
9 FB1 input Channel 1 voltage feedback input; connect to OUT1 in voltage mode, leave unconnected in current mode to minimize leakage current.
10 OUT1 output DAC channel 1 analog output voltage or current depending on programmed configuration.
11 OUT0 output DAC channel 0 analog output voltage or current depending on programmed configuration.
12 FB0 input Channel 0 voltage feedback input; connect to OUT0 in voltage mode, leave unconnected in current mode to minimize leakage current.
13 CAP power_in External bypass capacitor connection for internal LDO; connect 1.5μF capacitor between this pin and AGND.
14 AGND power_in Analog ground reference for all device circuits.
15 VDD power_in Supply voltage input 1.7V to 5.5V range; requires 0.1μF decoupling capacitor to AGND.
16 VREF power_in External reference voltage input or internal reference connection; connect 0.1μF capacitor to AGND; must not rise before VDD when external reference used.
17 Thermal Pad passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package WQFN-16(3x3)
Category Data Acquisition
Pins 17

CAD (KiCad official)

  • Symbol: DAC63204RTER
  • Footprint: Package_DFN_QFN:QFN-16-1EP_3x3mm_P0.5mm_EP1.7x1.7mm
  • 3D model: WQFN-16(3x3) (KiCad packages3D, STEP)
  • 3D model files: dac63204rter-etched.step / dac63204rter-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); dac63204rter.step / dac63204rter.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (86 pp, sha256 bafd26ceef14bae6, retrieved 2026-10-05, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF