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DAC61408RHAR
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Texas Instruments Digital To Analog Converters (DAC), VQFN-40-EP(6x6). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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DAC61408RHAR
Texas Instruments · Digital To Analog Converters (DAC) · VQFN-40-EP(6x6)
DAC61408RHAR from Texas Instruments, in a VQFN-40-EP(6x6). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | NC | unconnected | No internal connection; leave this pin unconnected. |
| 2 | NC | unconnected | No internal connection; leave this pin unconnected. |
| 3 | NC | unconnected | No internal connection; leave this pin unconnected. |
| 4 | NC | unconnected | No internal connection; leave this pin unconnected. |
| 5 | OUT0 | output | Analog DAC output voltage for channel 0, capable of sourcing or sinking up to 25 mA. |
| 6 | OUT1 | output | Analog DAC output voltage for channel 1, capable of sourcing or sinking up to 25 mA. |
| 7 | OUT2 | output | Analog DAC output voltage for channel 2, capable of sourcing or sinking up to 25 mA. |
| 8 | OUT3 | output | Analog DAC output voltage for channel 3, capable of sourcing or sinking up to 25 mA. |
| 9 | VIO | power_in | I/O supply voltage from 1.7 V to 5.5 V that sets the digital interface operating voltage. |
| 10 | GND | power_in | Ground reference point for all circuitry on the device. |
| 11 | SDO | output | Serial interface data output that must be enabled by setting the SDO-EN bit before use; data change on the SCLK rising edge by default (selectable with FSDO). |
| 12 | SCLK | input | Serial interface clock input. |
| 13 | SDI | input | Serial interface data input; data are clocked into the shift register on each SCLK falling edge. |
| 14 | CS | input | Active-low serial frame synchronization input that enables the serial input shift register when low. |
| 15 | TOGGLE0 | input | Toggle control for channel outputs in toggle mode: logic low selects Register A and logic high selects Register B; connect to GND if toggle operation is unused. |
| 16 | TOGGLE1 | input | Toggle control for channel outputs in toggle mode: logic low selects Register A and logic high selects Register B; connect to GND if toggle operation is unused. |
| 17 | TOGGLE2 | input | Toggle control for channel outputs in toggle mode: logic low selects Register A and logic high selects Register B; connect to GND if toggle operation is unused. |
| 18 | LDAC | input | Active-low synchronization input that simultaneously updates synchronous-mode DAC outputs when low; connect to VIO if unused. |
| 19 | RESET | input | Active-low reset input; a logic low (minimum 500 ns) causes a power-on-reset event. |
| 20 | CLR | input | Active-low clear input that sets all DAC outputs to their clear code when low; connect to VIO if unused. |
| 21 | ALMOUT | output | Open-drain alarm output that requires an external 10-kΩ pull-up to a voltage no higher than VIO. |
| 22 | TEMPOUT | output | Unbuffered analog temperature monitor output with a -4 mV/°C slope and 1.34 V offset (referenced to VDD). |
| 23 | OUT4 | output | Analog DAC output voltage for channel 4, capable of sourcing or sinking up to 25 mA. |
| 24 | OUT5 | output | Analog DAC output voltage for channel 5, capable of sourcing or sinking up to 25 mA. |
| 25 | OUT6 | output | Analog DAC output voltage for channel 6, capable of sourcing or sinking up to 25 mA. |
| 26 | OUT7 | output | Analog DAC output voltage for channel 7, capable of sourcing or sinking up to 25 mA. |
| 27 | NC | unconnected | No internal connection; leave this pin unconnected. |
| 28 | NC | unconnected | No internal connection; leave this pin unconnected. |
| 29 | NC | unconnected | No internal connection; leave this pin unconnected. |
| 30 | NC | unconnected | No internal connection; leave this pin unconnected. |
| 31 | VCC | power_in | Positive analog output supply, 9 V to 41.5 V; VCC-VSS must not exceed 43 V. |
| 32 | VSS | power_in | Negative analog output supply, -21.5 V to 0 V. |
| 33 | REF | bidirectional | Reference input when using an external reference, or internal 2.5 V reference output when using the internal reference; connect a 150 nF capacitor to ground. |
| 34 | REFCMP | bidirectional | Reference compensation capacitor connection; connect a 330 pF capacitor between REFCMP and REFGND. |
| 35 | REFGND | power_in | Ground reference point for the internal reference, REFGND pin voltage 0 V to 0.6 V. |
| 36 | GND | power_in | Ground reference point for all circuitry on the device. |
| 37 | VAA | power_in | Analog supply voltage from 4.5 V to 5.5 V that must be at the same potential as VDD. |
| 38 | VDD | power_in | Digital supply voltage from 4.5 V to 5.5 V that must be at the same potential as VAA. |
| 39 | VSS | power_in | Negative analog output supply, -21.5 V to 0 V. |
| 40 | VCC | power_in | Positive analog output supply, 9 V to 41.5 V; VCC-VSS must not exceed 43 V. |
| 41 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VQFN-40-EP(6x6) |
| Category | Data Acquisition |
| Pins | 41 |
CAD (KiCad official)
- Symbol:
DAC61408RHAR - Footprint:
Package_DFN_QFN:QFN-40-1EP_6x6mm_P0.5mm_EP4.6x4.6mm - 3D model: VQFN-40-EP(6x6) (KiCad packages3D, STEP)
- 3D model files:
dac61408rhar-etched.step/dac61408rhar-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);dac61408rhar.step/dac61408rhar.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (64 pp, sha256
68beae093c88022d, retrieved 2026-10-08, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# DAC61408RHAR
**Texas Instruments** · Digital To Analog Converters (DAC) · VQFN-40-EP(6x6)
DAC61408RHAR from Texas Instruments, in a VQFN-40-EP(6x6). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | NC | unconnected | No internal connection; leave this pin unconnected. |
| 2 | NC | unconnected | No internal connection; leave this pin unconnected. |
| 3 | NC | unconnected | No internal connection; leave this pin unconnected. |
| 4 | NC | unconnected | No internal connection; leave this pin unconnected. |
| 5 | OUT0 | output | Analog DAC output voltage for channel 0, capable of sourcing or sinking up to 25 mA. |
| 6 | OUT1 | output | Analog DAC output voltage for channel 1, capable of sourcing or sinking up to 25 mA. |
| 7 | OUT2 | output | Analog DAC output voltage for channel 2, capable of sourcing or sinking up to 25 mA. |
| 8 | OUT3 | output | Analog DAC output voltage for channel 3, capable of sourcing or sinking up to 25 mA. |
| 9 | VIO | power_in | I/O supply voltage from 1.7 V to 5.5 V that sets the digital interface operating voltage. |
| 10 | GND | power_in | Ground reference point for all circuitry on the device. |
| 11 | SDO | output | Serial interface data output that must be enabled by setting the SDO-EN bit before use; data change on the SCLK rising edge by default (selectable with FSDO). |
| 12 | SCLK | input | Serial interface clock input. |
| 13 | SDI | input | Serial interface data input; data are clocked into the shift register on each SCLK falling edge. |
| 14 | CS | input | Active-low serial frame synchronization input that enables the serial input shift register when low. |
| 15 | TOGGLE0 | input | Toggle control for channel outputs in toggle mode: logic low selects Register A and logic high selects Register B; connect to GND if toggle operation is unused. |
| 16 | TOGGLE1 | input | Toggle control for channel outputs in toggle mode: logic low selects Register A and logic high selects Register B; connect to GND if toggle operation is unused. |
| 17 | TOGGLE2 | input | Toggle control for channel outputs in toggle mode: logic low selects Register A and logic high selects Register B; connect to GND if toggle operation is unused. |
| 18 | LDAC | input | Active-low synchronization input that simultaneously updates synchronous-mode DAC outputs when low; connect to VIO if unused. |
| 19 | RESET | input | Active-low reset input; a logic low (minimum 500 ns) causes a power-on-reset event. |
| 20 | CLR | input | Active-low clear input that sets all DAC outputs to their clear code when low; connect to VIO if unused. |
| 21 | ALMOUT | output | Open-drain alarm output that requires an external 10-kΩ pull-up to a voltage no higher than VIO. |
| 22 | TEMPOUT | output | Unbuffered analog temperature monitor output with a -4 mV/°C slope and 1.34 V offset (referenced to VDD). |
| 23 | OUT4 | output | Analog DAC output voltage for channel 4, capable of sourcing or sinking up to 25 mA. |
| 24 | OUT5 | output | Analog DAC output voltage for channel 5, capable of sourcing or sinking up to 25 mA. |
| 25 | OUT6 | output | Analog DAC output voltage for channel 6, capable of sourcing or sinking up to 25 mA. |
| 26 | OUT7 | output | Analog DAC output voltage for channel 7, capable of sourcing or sinking up to 25 mA. |
| 27 | NC | unconnected | No internal connection; leave this pin unconnected. |
| 28 | NC | unconnected | No internal connection; leave this pin unconnected. |
| 29 | NC | unconnected | No internal connection; leave this pin unconnected. |
| 30 | NC | unconnected | No internal connection; leave this pin unconnected. |
| 31 | VCC | power_in | Positive analog output supply, 9 V to 41.5 V; VCC-VSS must not exceed 43 V. |
| 32 | VSS | power_in | Negative analog output supply, -21.5 V to 0 V. |
| 33 | REF | bidirectional | Reference input when using an external reference, or internal 2.5 V reference output when using the internal reference; connect a 150 nF capacitor to ground. |
| 34 | REFCMP | bidirectional | Reference compensation capacitor connection; connect a 330 pF capacitor between REFCMP and REFGND. |
| 35 | REFGND | power_in | Ground reference point for the internal reference, REFGND pin voltage 0 V to 0.6 V. |
| 36 | GND | power_in | Ground reference point for all circuitry on the device. |
| 37 | VAA | power_in | Analog supply voltage from 4.5 V to 5.5 V that must be at the same potential as VDD. |
| 38 | VDD | power_in | Digital supply voltage from 4.5 V to 5.5 V that must be at the same potential as VAA. |
| 39 | VSS | power_in | Negative analog output supply, -21.5 V to 0 V. |
| 40 | VCC | power_in | Positive analog output supply, 9 V to 41.5 V; VCC-VSS must not exceed 43 V. |
| 41 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VQFN-40-EP(6x6) |
| Category | Data Acquisition |
| Pins | 41 |
## CAD (KiCad official)
- Symbol: `DAC61408RHAR`
- Footprint: `Package_DFN_QFN:QFN-40-1EP_6x6mm_P0.5mm_EP4.6x4.6mm`
- 3D model: VQFN-40-EP(6x6) (KiCad packages3D, STEP)
- 3D model files: `dac61408rhar-etched.step` / `dac61408rhar-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `dac61408rhar.step` / `dac61408rhar.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/dac71408) (64 pp, sha256 `68beae093c88022d`, retrieved 2026-10-08, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/dac61408rhar-datasheet.pdf)