component
DAC43608RTET
Public Made by Adomby adom
Texas Instruments Digital To Analog Converters (DAC), WQFN-16-EP(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownDAC43608RTET
Texas Instruments · Digital To Analog Converters (DAC) · WQFN-16-EP(3x3)
DAC43608RTET from Texas Instruments, in a WQFN-16-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VOUTA | output | Buffered analog output voltage of DAC channel A, which swings rail-to-rail from 0 V to VDD. |
| 2 | VOUTB | output | Buffered analog output voltage of DAC channel B, which swings rail-to-rail from 0 V to VDD. |
| 3 | VOUTC | output | Buffered analog output voltage of DAC channel C, which swings rail-to-rail from 0 V to VDD. |
| 4 | VOUTD | output | Buffered analog output voltage of DAC channel D, which swings rail-to-rail from 0 V to VDD. |
| 5 | SDA | bidirectional | I2C serial data line used to shift data into and out of the input register; it is an open-drain bidirectional pin that must be pulled up to the supply voltage through an external pull-up resistor. |
| 6 | SCL | input | I2C serial interface clock input. |
| 7 | A0 | input | Four-state address input that selects the device's I2C address (tied to AGND, VDD, SDA, or SCL) and is sampled during the first byte of each data frame. |
| 8 | LDAC | input | Active-low load DAC input for synchronous updates: with LDAC high, writes are held in the buffer registers, and all DAC outputs update when LDAC is pulled low. |
| 9 | VOUTE | output | Buffered analog output voltage of DAC channel E, which swings rail-to-rail from 0 V to VDD. |
| 10 | VOUTF | output | Buffered analog output voltage of DAC channel F, which swings rail-to-rail from 0 V to VDD. |
| 11 | VOUTG | output | Buffered analog output voltage of DAC channel G, which swings rail-to-rail from 0 V to VDD. |
| 12 | VOUTH | output | Buffered analog output voltage of DAC channel H, which swings rail-to-rail from 0 V to VDD. |
| 13 | VDD | power_in | Analog supply voltage, specified from 1.8 V to 5.5 V. |
| 14 | AGND | power_in | Ground reference point for all circuitry in the device. |
| 15 | VREFIN | bidirectional | External reference input that sets the full-scale DAC output; it must be within 1.8 V to VDD, and its typical input impedance is 12.5 kΩ with all channels powered. |
| 16 | CLR | input | Asynchronous active-low clear input; when pulled low, the DAC buffer and active registers are set to zero code. |
| 17 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | WQFN-16-EP(3x3) |
| Category | Data Acquisition |
| Pins | 17 |
CAD (KiCad official)
- Symbol:
DAC43608RTET - Footprint:
Package_DFN_QFN:QFN-16-1EP_3x3mm_P0.5mm_EP1.7x1.7mm - 3D model: WQFN-16-EP(3x3) (KiCad packages3D, STEP)
- 3D model files:
dac43608rtet-etched.step/dac43608rtet-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);dac43608rtet.step/dac43608rtet.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (45 pp, sha256
2860193286fcc606, retrieved 2026-10-11, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).