component
DAC128S085CIMT
Public Made by Adomby adom
Texas Instruments Digital To Analog Converters (DAC), TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownDAC128S085CIMT
Texas Instruments · Digital To Analog Converters (DAC) · TSSOP-16
DAC128S085CIMT from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | DIN | input | Serial data input; data is clocked into the 16-bit shift register on the falling edges of SCLK after the fall of SYNC. |
| 2 | DOUT | output | Serial data output utilized in daisy-chain operation and connected directly to a DIN pin on another DAC128S085; data is not available unless SYNC remains low for more than 16 SCLK cycles. |
| 3 | VOUTA | output | Channel A analog output voltage; rail-to-rail output swing from 0 V to VA. |
| 4 | VOUTB | output | Channel B analog output voltage; rail-to-rail output swing from 0 V to VA. |
| 5 | VOUTC | output | Channel C analog output voltage; rail-to-rail output swing from 0 V to VA. |
| 6 | VOUTD | output | Channel D analog output voltage; rail-to-rail output swing from 0 V to VA. |
| 7 | VA | power_in | Supply voltage input with operating range 2.7 V to 5.5 V; must be decoupled to GND. |
| 8 | VREF1 | input | Unbuffered reference voltage for channels A, B, C, and D with operating range 0.5 V to VA; must be decoupled to GND. |
| 9 | VREF2 | input | Unbuffered reference voltage for channels E, F, G, and H with operating range 0.5 V to VA; must be decoupled to GND. |
| 10 | GND | power_in | Ground reference for all on-chip circuitry. |
| 11 | VOUTH | output | Channel H analog output voltage; rail-to-rail output swing from 0 V to VA. |
| 12 | VOUTG | output | Channel G analog output voltage; rail-to-rail output swing from 0 V to VA. |
| 13 | VOUTF | output | Channel F analog output voltage; rail-to-rail output swing from 0 V to VA. |
| 14 | VOUTE | output | Channel E analog output voltage; rail-to-rail output swing from 0 V to VA. |
| 15 | SYNC | input | Frame synchronization input; when low, data is written into the input shift register on falling edges of SCLK; rising edge after 16th falling edge of SCLK causes DAC update. |
| 16 | SCLK | input | Serial clock input; data is clocked into the input shift register on the falling edges; maximum frequency 40 MHz. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-16 |
| Category | Data Acquisition |
| Pins | 16 |
CAD (KiCad official)
- Symbol:
DAC128S085CIMT - Footprint:
Package_SO:TSSOP-16_4.4x5mm_P0.65mm - 3D model: TSSOP-16 (KiCad packages3D, STEP)
- 3D model files:
dac128s085cimt-etched.step/dac128s085cimt-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);dac128s085cimt.step/dac128s085cimt.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (38 pp, sha256
12de1f4c3c2baa00, retrieved 2026-10-01, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).