component
D5V0P4UR6SO-7
Public Made by Adomby adom
Diodes Incorporated ESD And Surge Protection (TVS/ESD), SOT-26. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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D5V0P4UR6SO-7
Diodes Incorporated · ESD And Surge Protection (TVS/ESD) · SOT-26
D5V0P4UR6SO-7 from Diodes Incorporated, in a SOT-26. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | I/O1 | passive | ESD-protected high-speed I/O channel 1, clamped to VSS (20A IPP 8/20µs, ±30kV contact/air ESD, 2.1pF typical capacitance). |
| 2 | VSS | power_in | Ground reference (VSS) for the TVS array, to which I/O pins are clamped and VCC is protected (45A IPP 8/20µs VCC to VSS). |
| 3 | I/O2 | passive | ESD-protected high-speed I/O channel 2, clamped to VSS (20A IPP 8/20µs, ±30kV contact/air ESD, 2.1pF typical capacitance). |
| 4 | I/O3 | passive | ESD-protected high-speed I/O channel 3, clamped to VSS (20A IPP 8/20µs, ±30kV contact/air ESD, 2.1pF typical capacitance). |
| 5 | VCC | power_in | Supply-rail connection of the TVS array with 3.3V reverse working voltage (3.6V max operating DC) and 4.5V minimum breakdown to VSS. |
| 6 | I/O4 | passive | ESD-protected high-speed I/O channel 4, clamped to VSS (20A IPP 8/20µs, ±30kV contact/air ESD, 2.1pF typical capacitance). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | SOT-26 |
| Category | Circuit Protection |
| Pins | 6 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Peak Pulse Current, per IEC 61000-4-5 (I/O to VSS) | IPP | 20 | A | I/O to VSS, 8/20μs | 2 | ||
| Peak Pulse Current, per IEC 61000-4-5 (VCC to VSS) | IPP | 45 | A | VCC to VSS, 8/20μs | 2 | ||
| Peak Pulse Power, per IEC 61000-4-5 | PPP | 180 | W | I/O to VSS, 8/20μs | 2 | ||
| Operating Supply Voltage (DC) | VDC | 3.6 | V | VCC to VSS | 2 | ||
| ESD Protection, Contact Discharge, per IEC 61000-4-2 | VESD_CONTACT | -30 | 30 | kV | I/O to VSS, VCC to VSS | 2 | |
| ESD Protection, Air Discharge, per IEC 61000-4-2 | VESD_AIR | -30 | 30 | kV | I/O to VSS, VCC to VSS | 2 | |
| Operating Temperature | TOP | -55 | 85 | °C | 2 | ||
| Storage Temperature | TSTG | -55 | 150 | °C | 2 | ||
| Power Dissipation Typical (Note 5) | PD | 300 | mW | Typical; Note 5 (FR-4 PCB pad layout, 2oz copper) | 2 | ||
| Thermal Resistance, Junction to Ambient Typical (Note 5) | RθJA | 417 | °C/W | Typical; Note 5 (FR-4 PCB pad layout, 2oz copper) | 2 | ||
| Reverse Working Voltage | VRWM | 3.3 | V | VCC to VSS | 2 | ||
| Reverse Leakage Current (Note 6) | ILEAK | 5 | μA | VCC = 3.3V, VCC to VSS | 2 | ||
| Channel Leakage Current (Note 6) | ICH-LEAK | 1 | μA | VI/O = 3.3V, I/O to VSS | 2 | ||
| Reverse Breakdown Voltage | VBR | 4.5 | 7 | V | IBR = 1mA, VCC to VSS | 2 | |
| Forward Clamping Voltage | VF | 0.8 | 1.2 | V | IF = 15mA, VSS to VCC | 2 | |
| Channel Input Capacitance (VCC = 3.3V) | CI/O | 2.1 | 2.5 | pF | VI/O = 1.65V, VCC = 3.3V, f = 1MHz | 2 | |
| Channel Input Capacitance (VCC floated) | CI/O | 2.4 | 3 | pF | VI/O = 1.65V, VCC = floated, f = 1MHz | 2 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | tin | Terminal Connections: See Schematic Terminals, Finish, Matte Tin Pleated Leadframe. | 1 |
CAD (KiCad official)
- Symbol:
D5V0P4UR6SO-7 - Footprint:
Package_TO_SOT_SMD:SOT-23-6 - 3D model: SOT-26 (KiCad packages3D, STEP)
- 3D model files:
d5v0p4ur6so-7-etched.step/d5v0p4ur6so-7-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);d5v0p4ur6so-7.step/d5v0p4ur6so-7.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Diodes Incorporated datasheet (5 pp, sha256
63551bc344af52bf, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# D5V0P4UR6SO-7
**Diodes Incorporated** · ESD And Surge Protection (TVS/ESD) · SOT-26
D5V0P4UR6SO-7 from Diodes Incorporated, in a SOT-26. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | I/O1 | passive | ESD-protected high-speed I/O channel 1, clamped to VSS (20A IPP 8/20µs, ±30kV contact/air ESD, 2.1pF typical capacitance). |
| 2 | VSS | power_in | Ground reference (VSS) for the TVS array, to which I/O pins are clamped and VCC is protected (45A IPP 8/20µs VCC to VSS). |
| 3 | I/O2 | passive | ESD-protected high-speed I/O channel 2, clamped to VSS (20A IPP 8/20µs, ±30kV contact/air ESD, 2.1pF typical capacitance). |
| 4 | I/O3 | passive | ESD-protected high-speed I/O channel 3, clamped to VSS (20A IPP 8/20µs, ±30kV contact/air ESD, 2.1pF typical capacitance). |
| 5 | VCC | power_in | Supply-rail connection of the TVS array with 3.3V reverse working voltage (3.6V max operating DC) and 4.5V minimum breakdown to VSS. |
| 6 | I/O4 | passive | ESD-protected high-speed I/O channel 4, clamped to VSS (20A IPP 8/20µs, ±30kV contact/air ESD, 2.1pF typical capacitance). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | SOT-26 |
| Category | Circuit Protection |
| Pins | 6 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Peak Pulse Current, per IEC 61000-4-5 (I/O to VSS) | IPP | | | 20 | A | I/O to VSS, 8/20μs | 2 |
| Peak Pulse Current, per IEC 61000-4-5 (VCC to VSS) | IPP | | | 45 | A | VCC to VSS, 8/20μs | 2 |
| Peak Pulse Power, per IEC 61000-4-5 | PPP | | | 180 | W | I/O to VSS, 8/20μs | 2 |
| Operating Supply Voltage (DC) | VDC | | | 3.6 | V | VCC to VSS | 2 |
| ESD Protection, Contact Discharge, per IEC 61000-4-2 | VESD_CONTACT | -30 | | 30 | kV | I/O to VSS, VCC to VSS | 2 |
| ESD Protection, Air Discharge, per IEC 61000-4-2 | VESD_AIR | -30 | | 30 | kV | I/O to VSS, VCC to VSS | 2 |
| Operating Temperature | TOP | -55 | | 85 | °C | | 2 |
| Storage Temperature | TSTG | -55 | | 150 | °C | | 2 |
| Power Dissipation Typical (Note 5) | PD | | 300 | | mW | Typical; Note 5 (FR-4 PCB pad layout, 2oz copper) | 2 |
| Thermal Resistance, Junction to Ambient Typical (Note 5) | RθJA | | 417 | | °C/W | Typical; Note 5 (FR-4 PCB pad layout, 2oz copper) | 2 |
| Reverse Working Voltage | VRWM | | | 3.3 | V | VCC to VSS | 2 |
| Reverse Leakage Current (Note 6) | ILEAK | | | 5 | μA | VCC = 3.3V, VCC to VSS | 2 |
| Channel Leakage Current (Note 6) | ICH-LEAK | | | 1 | μA | VI/O = 3.3V, I/O to VSS | 2 |
| Reverse Breakdown Voltage | VBR | 4.5 | | 7 | V | IBR = 1mA, VCC to VSS | 2 |
| Forward Clamping Voltage | VF | | 0.8 | 1.2 | V | IF = 15mA, VSS to VCC | 2 |
| Channel Input Capacitance (VCC = 3.3V) | CI/O | | 2.1 | 2.5 | pF | VI/O = 1.65V, VCC = 3.3V, f = 1MHz | 2 |
| Channel Input Capacitance (VCC floated) | CI/O | | 2.4 | 3 | pF | VI/O = 1.65V, VCC = floated, f = 1MHz | 2 |
## Materials and finish
As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | | tin | Terminal Connections: See Schematic Terminals, Finish, Matte Tin Pleated Leadframe. | 1 |
## CAD (KiCad official)
- Symbol: `D5V0P4UR6SO-7`
- Footprint: `Package_TO_SOT_SMD:SOT-23-6`
- 3D model: SOT-26 (KiCad packages3D, STEP)
- 3D model files: `d5v0p4ur6so-7-etched.step` / `d5v0p4ur6so-7-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `d5v0p4ur6so-7.step` / `d5v0p4ur6so-7.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Diodes Incorporated datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588918592402296832) (5 pp, sha256 `63551bc344af52bf`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/d5v0p4ur6so-7-datasheet.pdf)