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CYUSB3304-68LTXC

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Infineon Cypress Semicon USB Converters, QFN-68. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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CYUSB3304-68LTXC

Infineon Cypress Semicon · USB Converters · QFN-68

CYUSB3304-68LTXC from Infineon Cypress Semicon, in a QFN-68. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 DVDD12 power_in 1.2 V core supply.
2 RREF_USB2 passive Connect to a precision resistor (6.04 kΩ ±1%) to generate a current reference for the USB 2.0 PHY.
3 DVDD12 power_in 1.2 V core supply.
4 AVDD33 power_in 3.3 V analog supply.
5 US_TXM output Upstream port SuperSpeed transmit minus.
6 US_TXP output Upstream port SuperSpeed transmit plus.
7 DVDD12 power_in 1.2 V core supply.
8 US_RXM input Upstream port SuperSpeed receive minus.
9 US_RXP input Upstream port SuperSpeed receive plus.
10 AVDD12 power_in 1.2 V analog supply.
11 DS4_TXP output Downstream port 4 SuperSpeed transmit plus.
12 DS4_TXM output Downstream port 4 SuperSpeed transmit minus.
13 DVDD12 power_in 1.2 V core supply.
14 DS4_RXM input Downstream port 4 SuperSpeed receive minus.
15 DS4_RXP input Downstream port 4 SuperSpeed receive plus.
16 AVDD12 power_in 1.2 V analog supply.
17 VBUS_US power_in Must be connected to VBUS from the US port.
18 VBUS_DS power_in Powers the Apple-charging circuit; connect to local 5 V supply for multi-charger mode (Apple and BC v1.2 charging), or to GND for BC v1.2 charging only.
19 VDD_EFUSE power_in 1.2 V for normal operation, 2.5 V for programming; customers should connect to 1.2 V.
20 SUSPEND bidirectional Hub suspend status indicator, asserted when both the SS and USB 2.0 hubs are suspended and de-asserted when either hub leaves suspend.
21 RESERVED1 bidirectional Must be pulled HIGH using a 10 kΩ resistor to VDD_IO.
22 RESERVED2 input Must be pulled HIGH using a 10 kΩ resistor to VDD_IO.
23 MODE_SEL[0] input Device operation mode select bit 0; refer to Table 5.
24 MODE_SEL[1] input Device operation mode select bit 1; refer to Table 5.
25 NC unconnected No connect.
26 RREF_SS passive Connect to a precision resistor (200 Ω ±1%) for SS PHY termination impedance calibration.
27 DVDD12 power_in 1.2 V core supply.
28 VDD_IO power_in 3.3 V I/O supply.
29 PWR_EN bidirectional Ganged power enable output.
30 OVRCURR input Ganged overcurrent input.
31 RESETN input Active LOW reset input.
32 I2C_CLK bidirectional I2C clock; requires an external pull-up resistor.
33 I2C_DATA bidirectional I2C data; requires an external pull-up resistor.
34 AVDD12 power_in 1.2 V analog supply.
35 DS3_RXP input Downstream port 3 SuperSpeed receive plus.
36 DS3_RXM input Downstream port 3 SuperSpeed receive minus.
37 DVDD12 power_in 1.2 V core supply.
38 DS3_TXP output Downstream port 3 SuperSpeed transmit plus.
39 DS3_TXM output Downstream port 3 SuperSpeed transmit minus.
40 GND power_in Ground pin.
41 DS2_TXP output Downstream port 2 SuperSpeed transmit plus.
42 DS2_TXM output Downstream port 2 SuperSpeed transmit minus.
43 DVDD12 power_in 1.2 V core supply.
44 DS2_RXM input Downstream port 2 SuperSpeed receive minus.
45 DS2_RXP input Downstream port 2 SuperSpeed receive plus.
46 AVDD12 power_in 1.2 V analog supply.
47 DS1_TXP output Downstream port 1 SuperSpeed transmit plus.
48 DS1_TXM output Downstream port 1 SuperSpeed transmit minus.
49 DVDD12 power_in 1.2 V core supply.
50 DS1_RXM input Downstream port 1 SuperSpeed receive minus.
51 DS1_RXP input Downstream port 1 SuperSpeed receive plus.
52 AVDD12 power_in 1.2 V analog supply.
53 AVDD12 power_in 1.2 V analog supply.
54 XTL_OUT passive Crystal out; connects to the external 26 MHz crystal.
55 XTL_IN passive Crystal in; connects to the external 26 MHz crystal.
56 AVDD33 power_in 3.3 V analog supply.
57 US_DP bidirectional Upstream port USB 2.0 data plus.
58 US_DM bidirectional Upstream port USB 2.0 data minus.
59 DS1_DM bidirectional Downstream port 1 USB 2.0 data minus.
60 DS1_DP bidirectional Downstream port 1 USB 2.0 data plus.
61 AVDD33 power_in 3.3 V analog supply.
62 DS2_DP bidirectional Downstream port 2 USB 2.0 data plus.
63 DS2_DM bidirectional Downstream port 2 USB 2.0 data minus.
64 DS3_DM bidirectional Downstream port 3 USB 2.0 data minus.
65 DS3_DP bidirectional Downstream port 3 USB 2.0 data plus.
66 AVDD33 power_in 3.3 V analog supply.
67 DS4_DP bidirectional Downstream port 4 USB 2.0 data plus.
68 DS4_DM bidirectional Downstream port 4 USB 2.0 data minus.
69 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Infineon Cypress Semicon
Package QFN-68
Category Interface
Pins 69

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Storage temperature -65 150 °C 35
Operating temperature -40 85 °C 35
Electrostatic discharge voltage 2200 V 35
Oscillator or crystal frequency tolerance -150 150 ppm 35
I/O voltage supply 3 3.6 V 35
Maximum input sink current per I/O 4 mA 35
1.2 V core supply DVDD12 1.14 1.2 1.26 V 35
eFuse supply VDD_EFUSE 1.14 1.2 1.26 V Normal operation 35
eFuse supply VDD_EFUSE 2.5 2.6 2.7 V Programming 35
1.2 V analog supply AVDD12 1.14 1.2 1.26 V 35
3.3 V I/O supply VDD_IO 3 3.3 3.6 V 35
3.3 V analog supply AVDD33 3 3.3 3.6 V 35
Input LOW voltage VIL 0 V 35
Output HIGH voltage VOH 2.4 V Output HIGH voltage at IOH +4 mA 35
Output LOW voltage VOL 0.4 V Output LOW voltage at IOL -4 mA 35
Input sink current IOS 4 mA LED GPIO usage 35
Input leakage current IIX -1 1 µA All I/O signals held at VDD_IO or GND 35
Output HI-Z leakage current IOZ 10 µA 35
1.2 V supplies combined operating current ICC 410 526 mA 35
3.3 V supplies combined operating current ICC 260 286 mA 35
Voltage ramp rate on core and I/O supplies VRAMP 0.2 50 V/ms Voltage ramp must be monotonic 35
Noise level permitted on core and I/O supplies VN 100 mV Max p-p noise level permitted on all supplies except AVDD 35
Noise level permitted on AVDD12 and AVDD33 supply VN_USB 20 mV Max p-p noise level permitted USB supply 35
Operating ambient temperature TA -40 85 °C Family-wide value; this MPN is ordered for 0 °C-70 °C (see ordering row) 39
Operating junction temperature TJ -40 125 °C 39
Operating temperature range for CYUSB3304-68LTXC (commercial grade) 0 70 °C Ordering Information Table 13, 68-pin QFN, commercial 37
Package thermal resistance junction-to-ambient (68-pin QFN) TJA 16.2 °C/W 39
Package thermal resistance junction-to-case (68-pin QFN) TJC 23.8 °C/W 39

CAD (KiCad official)

  • Symbol: CYUSB3304-68LTXC
  • Footprint: Package_DFN_QFN:QFN-68-1EP_8x8mm_P0.4mm_EP5.2x5.2mm
  • 3D model: QFN-68 (KiCad packages3D, STEP)
  • 3D model files: cyusb3304-68ltxc-etched.step / cyusb3304-68ltxc-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cyusb3304-68ltxc.step / cyusb3304-68ltxc.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Infineon Cypress Semicon datasheet (46 pp, sha256 914c0436d3819954, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF