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CYHCPL3120
Public Made by Adomby adom
OCIC Optocouplers - Logic Output, DIP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownCYHCPL3120
OCIC · Optocouplers - Logic Output · DIP-8
CYHCPL3120 from OCIC, in a DIP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | N/C | unconnected | No internal connection. |
| 2 | ANODE | input | LED anode input; recommended LED on current IF(ON) is 7 to 16 mA, absolute max forward current 25 mA. |
| 3 | CATHODE | input | LED cathode input; reverse input voltage must not exceed 5.0 V. |
| 4 | N/C | unconnected | No internal connection. |
| 5 | VEE | power_in | Output-side negative supply/ground reference (VSS/VEE); VCC-VEE is 0 to 30 V. |
| 6 | VO | output | Gate drive output (pulldown side) with 2.0 A minimum peak output current, 3.0 A absolute max peak. |
| 7 | VO | output | Gate drive output (pullup side) with 2.0 A minimum peak output current, 3.0 A absolute max peak. |
| 8 | VCC | power_in | Positive output supply; operating VCC-VEE range is up to 30 V with UVLO positive threshold of 12.7 V typical. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | OCIC |
| Package | DIP-8 |
| Category | Optocoupler/LED/Digital Tube/Photoelectric Device |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Forward Voltage | VF | 1.2 | 1.5 | 1.8 | V | IF=10mA | 3 |
| Reverse Input Current | IR | 0.1 | uA | VR=5V | 3 | ||
| High Level Output Current | IOH | -1 | -2 | -2.5 | A | VO=VDD-3V | 3 |
| High Level Output Current | IOH | -2 | -2.5 | A | VO=VDD-6V | 3 | |
| Low Level Output Current | IOL | 1 | 2 | 2.5 | A | VO=VSS+3V | 3 |
| Low Level Output Current | IOL | 2 | 2.5 | A | VO=VEE+6V | 3 | |
| High Level Output Voltage (offset from VCC) | VOH | -6.25 | -2.5 | V | IO=-2.5A, IF=10mA; printed VCC- 6.25V / VCC- 2.5V | 3 | |
| High Level Output Voltage (offset from VCC) | VOH | -0.25 | -0.1 | V | IO=-100mA, IF=10mA; printed VCC- 0.25V / VCC- 0.1V | 3 | |
| Low Level Output Voltage (offset from VSS) | VOL | 2.5 | 6.25 | V | IO=2.5A, IF=0mA; printed VSS+2.5V / VSS+6.25V | 3 | |
| Low Level Output Voltage (offset from VSS) | VOL | 0.1 | 0.25 | V | IO=100mA, IF=0mA; printed VSS+0.1V / VSS+0.25V | 3 | |
| High Level Supply Current | ICCH | 2.8 | 3.8 | mA | IF =7 to 16Ma,VO=Open | 3 | |
| Low Level Supply Current | ICCL | 2.8 | 3.8 | mA | VF =0 to 0.8V,VO=Open | 3 | |
| Threshold Input Current Low to High | IFLH | 2.3 | 5 | mA | VO >5V, IO=0A | 3 | |
| Threshold Input Voltage High to Low | VFHL | 0.8 | V | VO <5V, IO=0A | 3 | ||
| UVLO Threshold (positive going) | VUVLO+ | 11.5 | 12.7 | 13.5 | V | VO>5V, IF = 10mA | 3 |
| UVLO Threshold (negative going) | VUVLO- | 10 | 11.2 | 12 | V | VO<5V, IF =10mA | 3 |
| UVLO Hysteresis | UVLOHYS | 1.5 | V | 3 | |||
| Propagation Delay Time to Output HIGH Level | TPLH | 150 | 255 | 400 | ns | Cg=10nF, f=10kHz, Rg=10Ω, Duty Cycle=50%, IF=7mA to 16mA, VCC=30V, VSS=Ground | 3 |
| Propagation Delay Time to Output LOW Level | TPHL | 150 | 275 | 400 | ns | Cg=10nF, f=10kHz, Rg=10Ω, Duty Cycle=50%, IF=7mA to 16mA, VCC=30V, VSS=Ground | 3 |
| Pulse Width Distortion | PWD | 20 | 100 | ns | 3 | ||
| Propagation Delay Difference Between Any Two Parts | /TPHL-TPLH/ | -250 | 250 | ns | 3 | ||
| Rise Time | Tr | 60 | ns | 3 | |||
| Fall Time | Tf | 60 | ns | 3 | |||
| Common Mode Transient Immunity (Output HIGH) | /CMH/ | 35 | 50 | kV/μs | TA = 25°C, IF = 7 to 16mA, VCM =2000V, VCC = 30V | 3 | |
| Common Mode Transient Immunity (Output LOW) | /CML/ | 35 | 50 | kV/μs | TA = 25°C, VF =0V, VCM =2000V, VCC = 30V | 3 | |
| Input-Output Momentary Withstand Voltage | VISO | 5000 | VRMS | RH<50%, TA=25℃, t=1min, 50HZ | 2 | ||
| Capacitance (Input-Output) | CISO | 1 | pF | f=1MHZ, VI-O=0V | 2 | ||
| Storage Temperature | TSTG | -55 | 125 | ℃ | Ta=25°C | 2 | |
| Operating Temperature | TOPR | -40 | 100 | ℃ | Ta=25°C | 2 | |
| Lead Solder Temperature | TSOL | 260 | ℃ | 10S 1.6mm below seating plane | 2 | ||
| Max Forward Input Current | IFM | 25 | mA | Ta=25°C | 2 | ||
| Reverse Input Voltage | VR | 5 | V | Ta=25°C | 2 | ||
| Peak Output Current | IO(PEAK) | 3 | A | Ta=25°C | 2 | ||
| Input Current (Rise/Fall time) | tr(IN)/tf(IN) | 500 | ns | Ta=25°C | 2 | ||
| Supply Voltage | VCC-VSS | 0 | 30 | V | Ta=25°C | 2 | |
| Operating Temperature | TA | -40 | 100 | ℃ | 2 | ||
| Power Supply Voltage | VCC-VSS | 0 | 30 | V | 2 | ||
| Output Voltage | VO(PEAK) | 15 | V | max printed as VDD | 2 | ||
| Input Current (ON) | IF(ON) | 7 | 16 | mA | 2 | ||
| Input Voltage (OFF) | VF(OFF) | -3 | 0.8 | V | 2 |
CAD (KiCad official)
- Symbol:
CYHCPL3120 - Footprint:
Package_DIP:DIP-8_W7.62mm - 3D model: DIP-8 (KiCad packages3D, STEP)
- 3D model files:
cyhcpl3120-etched.step/cyhcpl3120-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cyhcpl3120.step/cyhcpl3120.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: OCIC datasheet (11 pp, sha256
ffdd79c21dc00524, retrieved 2026-10-22, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).