component

CY8C9560A-24AXI

Public Made by Adom

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Cypress Semicon Pre-ordered Products, LQFP-100(14x14). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentelectronic tools-instruments-consumablescy8c9560a-24axifactory-2.0.0extractor-text

Changed since verified CY8C9560A-24AXI

by Ray · last 31 Oct 2026 · 1 record · files changed since
SymbolFootprint3D modelPins

Verification log 1 record

31 Oct 2026RayPublished by the parts factory: tier lcsc, 100 pinschanged since
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: CY8C9560A-24AXI · LQFP-100(14x14) · 100 pins
  • ✓copper: 100 copper pads, none touching another net
  • ✓datasheet: all 100 pin names found in the 32-page datasheet
  • ✓distributor: lcsc C2948519, digikey 448-CY8C9560A-24AXI-ND, mouser 727-CY8C9560A-24AXI
  • ✓family: LQFP-100_14x14mm_P0.5mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-qo934fk2/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 100 pins = 100 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 100 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files! cy8c9560a-24axi.kicad_sym✓ cy8c9560a-24axi.kicad_mod✓ cy8c9560a-24axi.step
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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray
viewers cy8c9560a-24axi: symbol repaired (body fitted to the names) · Ray
cy8c9560a-24axi-etched.glb Publish 0.1.0 · Ray
cy8c9560a-24axi-etched.step cy8c9560a-24axi: factory component page (tier=lcsc) · Ray
cy8c9560a-24axi-hero.glb cy8c9560a-24axi: hero GLB from the etched model (keeps the MPN mark) · Ray
cy8c9560a-24axi-hero.overlay.json Publish 0.1.0 · Ray
cy8c9560a-24axi.glb Publish 0.1.0 · Ray
cy8c9560a-24axi.kicad_mod Publish 0.1.0 · Ray
cy8c9560a-24axi.kicad_sym cy8c9560a-24axi: symbol repaired (body fitted to the names) · Ray
cy8c9560a-24axi.lbr cy8c9560a-24axi: symbol repaired (body fitted to the names) · Ray
cy8c9560a-24axi.step Publish 0.1.0 · Ray
package.json Publish 0.1.0 · Ray
page.json Set visibility: public · Ray
README.md Publish 0.1.0 · Ray
verification.json Verified: Published by the parts factory: tier lcsc, 100 pins · Ray

CY8C9560A-24AXI

Cypress Semicon · Pre-ordered Products · LQFP-100(14x14)

CY8C9560A-24AXI from Cypress Semicon, in a LQFP-100(14x14). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 DNU unconnected Do Not Use; leave floating.
2 DNU unconnected Do Not Use; leave floating.
3 GPort0_Bit3_PWM1 bidirectional Port 0 bit 3 GPIO, also selectable as PWM1 output; drive mode configurable (resistive pull-up/down, open drain, strong 10 mA source / 25 mA sink, or high-Z).
4 GPort0_Bit4_PWM7 bidirectional Port 0 bit 4 GPIO, also selectable as PWM7 output; drive mode configurable (resistive pull-up/down, open drain, strong 10 mA source / 25 mA sink, or high-Z).
5 GPort0_Bit5_PWM5 bidirectional Port 0 bit 5 GPIO, also selectable as PWM5 output; drive mode configurable (resistive pull-up/down, open drain, strong 10 mA source / 25 mA sink, or high-Z).
6 GPort0_Bit6_PWM3 bidirectional Port 0 bit 6 GPIO, also selectable as PWM3 output; drive mode configurable (resistive pull-up/down, open drain, strong 10 mA source / 25 mA sink, or high-Z).
7 GPort0_Bit7_PWM1 bidirectional Port 0 bit 7 GPIO, also selectable as PWM1 output; drive mode configurable (resistive pull-up/down, open drain, strong 10 mA source / 25 mA sink, or high-Z).
8 GPort3_Bit0_PWM7 bidirectional Port 3 bit 0 GPIO, also selectable as PWM7 output; drive mode configurable (resistive pull-up/down, open drain, strong 10 mA source / 25 mA sink, or high-Z).
9 GPort3_Bit1_PWM5 bidirectional Port 3 bit 1 GPIO, also selectable as PWM5 output; drive mode configurable (resistive pull-up/down, open drain, strong 10 mA source / 25 mA sink, or high-Z).
10 GPort3_Bit2_PWM3 bidirectional Port 3 bit 2 GPIO, also selectable as PWM3 output; drive mode configurable (resistive pull-up/down, open drain, strong 10 mA source / 25 mA sink, or high-Z).
11 GPort3_Bit3_PWM1 bidirectional Port 3 bit 3 GPIO, also selectable as PWM1 output; drive mode configurable (resistive pull-up/down, open drain, strong 10 mA source / 25 mA sink, or high-Z).
12 DNU unconnected Do Not Use; leave floating.
13 DNU unconnected Do Not Use; leave floating.
14 DNU unconnected Do Not Use; leave floating.
15 VSS power_in Ground connection.
16 GPort3_Bit4_PWM15 bidirectional Port 3 bit 4 GPIO, also selectable as PWM15 output; drive mode configurable (resistive pull-up/down, open drain, strong 10 mA source / 25 mA sink, or high-Z).
17 GPort3_Bit5_PWM13 bidirectional Port 3 bit 5 GPIO, also selectable as PWM13 output; drive mode configurable (resistive pull-up/down, open drain, strong 10 mA source / 25 mA sink, or high-Z).
18 GPort3_Bit6_PWM11 bidirectional Port 3 bit 6 GPIO, also selectable as PWM11 output; drive mode configurable (resistive pull-up/down, open drain, strong 10 mA source / 25 mA sink, or high-Z).
19 GPort3_Bit7_PWM9 bidirectional Port 3 bit 7 GPIO, also selectable as PWM9 output; drive mode configurable (resistive pull-up/down, open drain, strong 10 mA source / 25 mA sink, or high-Z).
20 GPort5_Bit7_PWM15 bidirectional Port 5 bit 7 GPIO, also selectable as PWM15 output; drive mode configurable (resistive pull-up/down, open drain, strong 10 mA source / 25 mA sink, or high-Z).
21 GPort5_Bit6_PWM13 bidirectional Port 5 bit 6 GPIO, also selectable as PWM13 output; drive mode configurable (resistive pull-up/down, open drain, strong 10 mA source / 25 mA sink, or high-Z).
22 GPort5_Bit2_PWM11 bidirectional Port 5 bit 2 GPIO, also selectable as PWM11 output; drive mode configurable (resistive pull-up/down, open drain, strong 10 mA source / 25 mA sink, or high-Z).
23 GPort5_Bit3_PWM9 bidirectional Port 5 bit 3 GPIO, also selectable as PWM9 output; drive mode configurable (resistive pull-up/down, open drain, strong 10 mA source / 25 mA sink, or high-Z).
24 I2C Serial Clock (SCL) input I2C clock input; the I2C slave requires a master that supports clock stretching, and only standard mode (0-100 kHz) is supported.
25 DNU unconnected Do Not Use; leave floating.
26 DNU unconnected Do Not Use; leave floating.
27 DNU unconnected Do Not Use; leave floating.
28 I2C Serial Data (SDA) bidirectional I2C data line; only standard mode (0-100 kHz) is supported, and fast mode is not supported.
29 GPort2_Bit3_PWM11/A1 bidirectional Port 2 bit 3 GPIO, PWM11 output, or extendable soft address bit A1 when used for address configuration (A1 is used only if A0 is a weak pull).
30 A0 input Fixed I2C address bit 0; must be pulled up or down, using a strong pull (≤330 Ω) to make it the only address line or a weak pull (75K-200K Ω) to extend the address.
31 DNU unconnected Do Not Use; leave floating.
32 Vdd power_in Supply voltage; operating ranges are 4.75-5.25 V or 3.0-3.6 V.
33 DNU unconnected Do Not Use; leave floating.
34 VSS power_in Ground connection.
35 DNU unconnected Do Not Use; leave floating.
36 GPort7_Bit7_PWM15 bidirectional Port 7 bit 7 GPIO, also selectable as PWM15 output; drive mode configurable (resistive pull-up/down, open drain, strong 10 mA source / 25 mA sink, or high-Z).
37 GPort7_Bit6_PWM14 bidirectional Port 7 bit 6 GPIO, also selectable as PWM14 output; drive mode configurable (resistive pull-up/down, open drain, strong 10 mA source / 25 mA sink, or high-Z).
38 GPort7_Bit5_PWM13 bidirectional Port 7 bit 5 GPIO, also selectable as PWM13 output; drive mode configurable (resistive pull-up/down, open drain, strong 10 mA source / 25 mA sink, or high-Z).
39 GPort7_Bit4_PWM12 bidirectional Port 7 bit 4 GPIO, also selectable as PWM12 output; drive mode configurable (resistive pull-up/down, open drain, strong 10 mA source / 25 mA sink, or high-Z).
40 GPort7_Bit3_PWM11 bidirectional Port 7 bit 3 GPIO, also selectable as PWM11 output; drive mode configurable (resistive pull-up/down, open drain, strong 10 mA source / 25 mA sink, or high-Z).
41 GPort7_Bit2_PWM10 bidirectional Port 7 bit 2 GPIO, also selectable as PWM10 output; drive mode configurable (resistive pull-up/down, open drain, strong 10 mA source / 25 mA sink, or high-Z).
42 GPort7_Bit1_PWM9 bidirectional Port 7 bit 1 GPIO, also selectable as PWM9 output; drive mode configurable (resistive pull-up/down, open drain, strong 10 mA source / 25 mA sink, or high-Z).
43 GPort7_Bit0_PWM8 bidirectional Port 7 bit 0 GPIO, also selectable as PWM8 output; drive mode configurable (resistive pull-up/down, open drain, strong 10 mA source / 25 mA sink, or high-Z).
44 GPort2_Bit2_PWM8/WD bidirectional Port 2 bit 2 GPIO, PWM8 output, or EEPROM Write Disable input; when WD is enabled, a high level blocks all EEPROM write operations.
45 INT output Active-high interrupt output with strong drive, asserted on a masked GPIO input change or PWM state change and released when the Interrupt Status register is read.
46 GPort2_Bit1_PWM12/A2 bidirectional Port 2 bit 1 GPIO, PWM12 output, or extendable soft address bit A2 when needed for address configuration.
47 GPort2_Bit0_PWM14/A3 bidirectional Port 2 bit 0 GPIO, PWM14 output, or extendable soft address bit A3 when needed for address configuration.
48 DNU unconnected Do Not Use; leave floating.
49 DNU unconnected Do Not Use; leave floating.
50 DNU unconnected Do Not Use; leave floating.
51 DNU unconnected Do Not Use; leave floating.
52 GPort5_Bit1_PWM8 bidirectional Port 5 bit 1 GPIO, also selectable as PWM8 output; drive mode configurable (resistive pull-up/down, open drain, strong 10 mA source / 25 mA sink, or high-Z).
53 GPort5_Bit0_PWM10 bidirectional Port 5 bit 0 GPIO, also selectable as PWM10 output; drive mode configurable (resistive pull-up/down, open drain, strong 10 mA source / 25 mA sink, or high-Z).
54 GPort5_Bit4_PWM12 bidirectional Port 5 bit 4 GPIO, also selectable as PWM12 output; drive mode configurable (resistive pull-up/down, open drain, strong 10 mA source / 25 mA sink, or high-Z).
55 GPort5_Bit5_PWM14 bidirectional Port 5 bit 5 GPIO, also selectable as PWM14 output; drive mode configurable (resistive pull-up/down, open drain, strong 10 mA source / 25 mA sink, or high-Z).
56 GPort4_Bit7_PWM8 bidirectional Port 4 bit 7 GPIO, also selectable as PWM8 output; drive mode configurable (resistive pull-up/down, open drain, strong 10 mA source / 25 mA sink, or high-Z).
57 GPort4_Bit6_PWM10 bidirectional Port 4 bit 6 GPIO, also selectable as PWM10 output; drive mode configurable (resistive pull-up/down, open drain, strong 10 mA source / 25 mA sink, or high-Z).
58 GPort4_Bit5_PWM12 bidirectional Port 4 bit 5 GPIO, also selectable as PWM12 output; drive mode configurable (resistive pull-up/down, open drain, strong 10 mA source / 25 mA sink, or high-Z).
59 GPort4_Bit4_PWM14 bidirectional Port 4 bit 4 GPIO, also selectable as PWM14 output; drive mode configurable (resistive pull-up/down, open drain, strong 10 mA source / 25 mA sink, or high-Z).
60 DNU unconnected Do Not Use; leave floating.
61 DNU unconnected Do Not Use; leave floating.
62 XRES input Active-high external reset with an always-on internal pull-down; a high level causes a full device reset, and the pin may be tied to ground or left open.
63 GPort4_Bit3_PWM0 bidirectional Port 4 bit 3 GPIO, also selectable as PWM0 output; drive mode configurable (resistive pull-up/down, open drain, strong 10 mA source / 25 mA sink, or high-Z).
64 GPort4_Bit2_PWM2 bidirectional Port 4 bit 2 GPIO, also selectable as PWM2 output; drive mode configurable (resistive pull-up/down, open drain, strong 10 mA source / 25 mA sink, or high-Z).
65 VSS power_in Ground connection.
66 GPort4_Bit1_PWM4 bidirectional Port 4 bit 1 GPIO, also selectable as PWM4 output; drive mode configurable (resistive pull-up/down, open drain, strong 10 mA source / 25 mA sink, or high-Z).
67 GPort4_Bit0_PWM6 bidirectional Port 4 bit 0 GPIO, also selectable as PWM6 output; drive mode configurable (resistive pull-up/down, open drain, strong 10 mA source / 25 mA sink, or high-Z).
68 GPort1_Bit7_PWM0/A4 bidirectional Port 1 bit 7 GPIO, PWM0 output, or extendable soft address bit A4 when needed for address configuration.
69 GPort1_Bit6_PWM2/A5 bidirectional Port 1 bit 6 GPIO, PWM2 output, or extendable soft address bit A5 when needed for address configuration.
70 GPort1_Bit5_PWM4/A6 bidirectional Port 1 bit 5 GPIO, PWM4 output, or extendable soft address bit A6 when needed for address configuration.
71 DNU unconnected Do Not Use; leave floating.
72 GPort1_Bit4_PWM6 bidirectional Port 1 bit 4 GPIO, also selectable as PWM6 output; drive mode configurable (resistive pull-up/down, open drain, strong 10 mA source / 25 mA sink, or high-Z).
73 DNU unconnected Do Not Use; leave floating.
74 GPort1_Bit3_PWM0 bidirectional Port 1 bit 3 GPIO, also selectable as PWM0 output; drive mode configurable (resistive pull-up/down, open drain, strong 10 mA source / 25 mA sink, or high-Z).
75 DNU unconnected Do Not Use; leave floating.
76 DNU unconnected Do Not Use; leave floating.
77 GPort1_Bit2_PWM2 bidirectional Port 1 bit 2 GPIO, also selectable as PWM2 output; drive mode configurable (resistive pull-up/down, open drain, strong 10 mA source / 25 mA sink, or high-Z).
78 DNU unconnected Do Not Use; leave floating.
79 GPort1_Bit1_PWM4 bidirectional Port 1 bit 1 GPIO, also selectable as PWM4 output; drive mode configurable (resistive pull-up/down, open drain, strong 10 mA source / 25 mA sink, or high-Z).
80 DNU unconnected Do Not Use; leave floating.
81 GPort1_Bit0_PWM6 bidirectional Port 1 bit 0 GPIO, also selectable as PWM6 output; drive mode configurable (resistive pull-up/down, open drain, strong 10 mA source / 25 mA sink, or high-Z).
82 Vdd power_in Supply voltage; operating ranges are 4.75-5.25 V or 3.0-3.6 V.
83 Vdd power_in Supply voltage; operating ranges are 4.75-5.25 V or 3.0-3.6 V.
84 VSS power_in Ground connection.
85 VSS power_in Ground connection.
86 GPort6_Bit0_PWM0 bidirectional Port 6 bit 0 GPIO, also selectable as PWM0 output; drive mode configurable (resistive pull-up/down, open drain, strong 10 mA source / 25 mA sink, or high-Z).
87 GPort6_Bit1_PWM1 bidirectional Port 6 bit 1 GPIO, also selectable as PWM1 output; drive mode configurable (resistive pull-up/down, open drain, strong 10 mA source / 25 mA sink, or high-Z).
88 GPort6_Bit2_PWM2 bidirectional Port 6 bit 2 GPIO, also selectable as PWM2 output; drive mode configurable (resistive pull-up/down, open drain, strong 10 mA source / 25 mA sink, or high-Z).
89 GPort6_Bit3_PWM3 bidirectional Port 6 bit 3 GPIO, also selectable as PWM3 output; drive mode configurable (resistive pull-up/down, open drain, strong 10 mA source / 25 mA sink, or high-Z).
90 GPort6_Bit4_PWM4 bidirectional Port 6 bit 4 GPIO, also selectable as PWM4 output; drive mode configurable (resistive pull-up/down, open drain, strong 10 mA source / 25 mA sink, or high-Z).
91 GPort6_Bit5_PWM5 bidirectional Port 6 bit 5 GPIO, also selectable as PWM5 output; drive mode configurable (resistive pull-up/down, open drain, strong 10 mA source / 25 mA sink, or high-Z).
92 GPort6_Bit6_PWM6 bidirectional Port 6 bit 6 GPIO, also selectable as PWM6 output; drive mode configurable (resistive pull-up/down, open drain, strong 10 mA source / 25 mA sink, or high-Z).
93 GPort6_Bit7_PWM7 bidirectional Port 6 bit 7 GPIO, also selectable as PWM7 output; drive mode configurable (resistive pull-up/down, open drain, strong 10 mA source / 25 mA sink, or high-Z).
94 DNU unconnected Do Not Use; leave floating.
95 GPort0_Bit0_PWM7 bidirectional Port 0 bit 0 GPIO, also selectable as PWM7 output; drive mode configurable (resistive pull-up/down, open drain, strong 10 mA source / 25 mA sink, or high-Z).
96 DNU unconnected Do Not Use; leave floating.
97 GPort0_Bit1_PWM5 bidirectional Port 0 bit 1 GPIO, also selectable as PWM5 output; drive mode configurable (resistive pull-up/down, open drain, strong 10 mA source / 25 mA sink, or high-Z).
98 DNU unconnected Do Not Use; leave floating.
99 GPort0_Bit2_PWM3 bidirectional Port 0 bit 2 GPIO, also selectable as PWM3 output; drive mode configurable (resistive pull-up/down, open drain, strong 10 mA source / 25 mA sink, or high-Z).
100 DNU unconnected Do Not Use; leave floating.

Key specifications

Parameter Value
Manufacturer Cypress Semicon
Package LQFP-100(14x14)
Category Electronic Tools/Instruments/Consumables
Pins 100

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Storage temperature TSTG -55 25 100 °C Higher storage temperatures reduce data retention time. 16
Bake time TBAKETIME 72 Hours 16
Ambient temperature with power applied TA -40 85 °C With power applied 16
Supply voltage on Vdd relative to Vss Vdd -0.5 6 V Relative to Vss 16
Maximum current into any port pin IMIO -25 50 mA 16
Electro Static Discharge Voltage ESD 2000 V Human Body Model ESD 16
Latch up current LU 200 mA 16
Ambient temperature TA -40 85 °C 16
Junction temperature TJ -40 100 °C 16
Supply voltage Vdd 3 5.25 V 17
Supply current Vdd 5 V IDD 15 25 mA Conditions are 5.0 V, TA = 25 C, IOH = 0. 17
Supply current Vdd 3.3 V IDD3 5 9 mA Conditions are 3.3 V, TA = 25 C, IOH = 0. 17
Flash (EEPROM) endurance (by block) FlashENPB 10000 Erase/write cycles by block. 17
Flash endurance (total) FlashENT 1.8e+06 Erase/write cycles. 17
Flash data retention FlashDR 10 Years 17
Output low level VOL 0.75 V IOL = 25 mA for any one pin, Vdd = 4.75 to 5.25 V. 18
High level source current IOH 10 mA VOH = Vdd-1.0 V 18
Low level sink current IOL 25 mA VOL = 0.75 V 18
Input low level VIL 0.8 V Vdd = 3.0 to 5.5. 18
Input high level VIH 2.1 V Vdd = 3.0 to 5.5. 18
Capacitive load on pins as input CIN 3.5 10 pF Package and pin dependent. Temp = 25 C. 18
Capacitive load on pins as output COUT 3.5 10 pF Package and pin dependent. Temp = 25 C. 18
Pull-up resistor RPU 4 5.6 8 k 18
Pull-down resistor RPD 4 5.6 8 k 18
GPIO Operating Frequency FGPIO 0 12 MHz Normal Strong Mode 19
Rise time, normal strong mode TRiseF 3 18 ns Cload = 50 pF; Vdd = 4.75 to 5.25 V, 10%-90% 19
Fall time, normal strong mode TFallF 2 18 ns Cload = 50 pF; Vdd = 4.75 to 5.25 V, 10%-90% 19
Rise time, slow strong mode TRiseS 10 27 ns Cload = 50 pF; Vdd = 3 to 5.25 V, 10%-90% 19
Fall time, slow strong mode TFallS 10 22 ns Cload = 50 pF; Vdd = 3 to 5.25 V, 10%-90% 19
IO access time TIOAccess 2.485 ms 19
Minimum pulse width on I/Os to assert INT line TPulsewidth 5.03 ms No I2C activity or EEPROM operation happens during input pulse duration. 19
24 MHz based PWM peak-to-peak period jitter Jitter24MHzPWM 0.1 1.5 % 24 MHz, 1.5 MHz, 93.75 kHz and 367.6 Hz (programmable) sources. 19
32 kHz-based PWM peak-to-peak period jitter Jitter32kHzPWM 2.5 5 % 32 kHz clock source. 19
Input Frequency of 24 MHz based PWM F24MHzPWM 23.4 24 24.6 MHz 19
Input Frequency of 32 kHz based PWM F32kHzPWM 15 32 64 kHz 19
Input frequency of 1.5 MHz based PWM F1.5MHzPWM 1.46 1.5 1.53 MHz 19
Input Frequency of 93.75 kHz based PWM F93.75kHzPWM 91.4 93.75 96.09 kHz 20
SCL clock frequency FSCLI2C 0 100 kHz Standard Mode 20
Hold time (repeated) START condition THDSTAI2C 4 s Standard Mode 20
LOW period of the SCL clock TLOWI2C 4.7 s Standard Mode 20
HIGH period of the SCL clock THIGHI2C 4 s Standard Mode 20
Setup time for a repeated START condition TSUSTAI2C 4.7 s Standard Mode 20
Data hold time THDDATI2C 0 s Standard Mode 20
Data setup time TSUDATI2C 250 ns Standard Mode 20
Setup time for STOP condition TSUSTOI2C 4 s Standard Mode 20
Bus free time between a STOP and START condition TBUFI2C 4.7 s Standard Mode 20
EEPROM Erase + Write time TEEPROMWrite_Hot 100 ms 0 °C Tj 100 °C 20
EEPROM Erase + Write time TEEPROMWrite_Cold 200 ms -40 °C Tj 0 °C 20
Maximum peak temperature (TC), reflow TC 260 °C 100-pin TQFP 23
Maximum time above TC, 5 °C 30 seconds 100-pin TQFP 23
Typical thermal impedance, junction to ambient JA 48 C/W 100-pin TQFP 23

CAD (KiCad official)

  • Symbol: CY8C9560A-24AXI
  • Footprint: Package_QFP:LQFP-100_14x14mm_P0.5mm
  • 3D model: LQFP-100(14x14) (KiCad packages3D, STEP)
  • 3D model files: cy8c9560a-24axi-etched.step / cy8c9560a-24axi-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cy8c9560a-24axi.step / cy8c9560a-24axi.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Cypress Semicon datasheet (32 pp, sha256 fff214fa37aa732e, retrieved 2026-10-31, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF