CY8C4147LQS-S473

{
  "slug": "cy8c4147lqs-s473",
  "version": "0.1.0",
  "type": "component",
  "description": "Cypress Semicon Microcontroller Units (MCUs/MPUs/SOCs), QFN-40(6x6). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "single chip microcomputer-microcontroller",
    "cy8c4147lqs-s473",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "cy8c4147lqs-s473.kicad_sym",
    "cy8c4147lqs-s473.kicad_mod",
    "cy8c4147lqs-s473.glb",
    "cy8c4147lqs-s473.step",
    "cy8c4147lqs-s473.lbr",
    "docs/hero.png",
    "docs/cy8c4147lqs-s473-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "cy8c4147lqs-s473-hero.glb",
    "cy8c4147lqs-s473-hero.overlay.json",
    "cy8c4147lqs-s473-etched.glb"
  ],
  "component": {
    "mpn": "CY8C4147LQS-S473",
    "manufacturer": "Cypress Semicon",
    "package": "QFN-40(6x6)",
    "pin_count": 41,
    "category": "Single Chip Microcomputer/Microcontroller",
    "subcategory": "Microcontroller Units (MCUs/MPUs/SOCs)",
    "datasheet": "https://www.infineon.com/dgdl/Infineon-Automotive_PSoC_4_PSoC_4100S_Plus_Datasheet_Programmable_System-on-Chip_(PSoC)-AdditionalTechnicalInformation-v14_00-EN.pdf?fileId=8ac78c8c7d0d8da4017d0ee7ff0b70e8&utm_source=cypress&utm_medium=referral&utm_campaign=",
    "parts": {
      "symbol": "cy8c4147lqs-s473.kicad_sym",
      "footprint": "cy8c4147lqs-s473.kicad_mod",
      "model_3d": "cy8c4147lqs-s473-hero.glb",
      "model_3d_plain": "cy8c4147lqs-s473-etched.glb",
      "model_3d_step": "cy8c4147lqs-s473-etched.step",
      "model_3d_step_plain": "cy8c4147lqs-s473.step",
      "lbr": "cy8c4147lqs-s473.lbr"
    },
    "distributor_links": {
      "lcsc": "C2948671",
      "digikey": "448-CY8C4147LQS-S473-ND",
      "mouser": "727-CY8C4147LQS-S473"
    },
    "distributor_check": {
      "checked_at": "2026-10-26T18:41:22Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "448-CY8C4147LQS-S473-ND",
        "status": "found"
      },
      "mouser": {
        "pn": "727-CY8C4147LQS-S473",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "P2.3",
        "type": "bidirectional",
        "description": "GPIO port 2 bit 3 with SAR mux input sarmux[3], Smart I/O[0].io[3], TCPWM line_compl[5] and SCB1 SPI select0 alternate functions."
      },
      {
        "number": "2",
        "name": "P2.4",
        "type": "bidirectional",
        "description": "GPIO port 2 bit 4 with SAR mux input sarmux[4], Smart I/O[0].io[4], TCPWM line[0], SCB3 UART RX and SCB1 SPI select1 alternate functions."
      },
      {
        "number": "3",
        "name": "P2.5",
        "type": "bidirectional",
        "description": "GPIO port 2 bit 5 with SAR mux input sarmux[5], Smart I/O[0].io[5], TCPWM line_compl[0], SCB3 UART TX and SCB1 SPI select2 alternate functions."
      },
      {
        "number": "4",
        "name": "P2.6",
        "type": "bidirectional",
        "description": "GPIO port 2 bit 6 with SAR mux input sarmux[6], Smart I/O[0].io[6], TCPWM line[1], SCB3 UART CTS and SCB1 SPI select3 alternate functions."
      },
      {
        "number": "5",
        "name": "P2.7",
        "type": "bidirectional",
        "description": "GPIO port 2 bit 7 with SAR mux input sarmux[7], Smart I/O[0].io[7], TCPWM line_compl[1], SCB3 UART RTS, lpcomp.comp[0] and SCB2 SPI MOSI alternate functions."
      },
      {
        "number": "6",
        "name": "P6.0",
        "type": "bidirectional",
        "description": "GPIO port 6 bit 0 with TCPWM line[4], SCB3 UART RX, CAN tx_enb_n, SCB3 I2C SCL and SCB3 SPI MOSI alternate functions."
      },
      {
        "number": "7",
        "name": "P6.1",
        "type": "bidirectional",
        "description": "GPIO port 6 bit 1 with TCPWM line_compl[4], SCB3 UART TX, CAN RX, SCB3 I2C SDA and SCB3 SPI MISO alternate functions."
      },
      {
        "number": "8",
        "name": "P6.2",
        "type": "bidirectional",
        "description": "GPIO port 6 bit 2 with TCPWM line[5], SCB3 UART CTS, CAN TX and SCB3 SPI clock alternate functions."
      },
      {
        "number": "9",
        "name": "VSSD",
        "type": "power_in",
        "description": "Ground pin for the digital section."
      },
      {
        "number": "10",
        "name": "P3.0",
        "type": "bidirectional",
        "description": "GPIO port 3 bit 0 with Smart I/O[1].io[0], TCPWM line[0], SCB1 UART RX, I2C SCL and SPI MOSI alternate functions."
      },
      {
        "number": "11",
        "name": "P3.1",
        "type": "bidirectional",
        "description": "GPIO port 3 bit 1 with Smart I/O[1].io[1], TCPWM line_compl[0], SCB1 UART TX, I2C SDA and SPI MISO alternate functions."
      },
      {
        "number": "12",
        "name": "P3.2",
        "type": "bidirectional",
        "description": "GPIO port 3 bit 2 with Smart I/O[1].io[2], TCPWM line[1], SCB1 UART CTS, SWD data (cpuss.swd_data) and SPI clock alternate functions."
      },
      {
        "number": "13",
        "name": "P3.3",
        "type": "bidirectional",
        "description": "GPIO port 3 bit 3 with Smart I/O[1].io[3], TCPWM line_compl[1], SCB1 UART RTS, SWD clock (cpuss.swd_clk) and SPI select0 alternate functions."
      },
      {
        "number": "14",
        "name": "P3.4",
        "type": "bidirectional",
        "description": "GPIO port 3 bit 4 with Smart I/O[1].io[4], TCPWM line[2], TCPWM trigger input tr_in[6] and SCB1 SPI select1 alternate functions."
      },
      {
        "number": "15",
        "name": "P3.5",
        "type": "bidirectional",
        "description": "GPIO port 3 bit 5 with Smart I/O[1].io[5], TCPWM line_compl[2] and SCB1 SPI select2 alternate functions."
      },
      {
        "number": "16",
        "name": "P3.6",
        "type": "bidirectional",
        "description": "GPIO port 3 bit 6 with Smart I/O[1].io[6], TCPWM line[3] and SCB1 SPI select3 alternate functions."
      },
      {
        "number": "17",
        "name": "P3.7",
        "type": "bidirectional",
        "description": "GPIO port 3 bit 7 with Smart I/O[1].io[7], TCPWM line_compl[3], lpcomp.comp[1] and SCB2 SPI MISO alternate functions."
      },
      {
        "number": "18",
        "name": "P4.0",
        "type": "bidirectional",
        "description": "GPIO port 4 bit 0 with CAPSENSE external Vref (csd.vref_ext), SCB0 UART RX, CAN RX, I2C SCL and SPI MOSI alternate functions."
      },
      {
        "number": "19",
        "name": "P4.1",
        "type": "bidirectional",
        "description": "GPIO port 4 bit 1 with CAPSENSE shield (csd.cshield), SCB0 UART TX, CAN TX, I2C SDA and SPI MISO alternate functions."
      },
      {
        "number": "20",
        "name": "P4.2",
        "type": "bidirectional",
        "description": "GPIO port 4 bit 2 with CAPSENSE Cmod/CintA capacitor connection, SCB0 UART CTS, CAN tx_enb_n, lpcomp.comp[0] and SPI clock alternate functions."
      },
      {
        "number": "21",
        "name": "P4.3",
        "type": "bidirectional",
        "description": "GPIO port 4 bit 3 with CAPSENSE shield tank/CintB capacitor connection, SCB0 UART RTS, lpcomp.comp[1] and SPI select0 alternate functions."
      },
      {
        "number": "22",
        "name": "P0.0",
        "type": "bidirectional",
        "description": "GPIO port 0 bit 0 with low-power comparator positive input lpcomp.in_p[0], TCPWM trigger in[0], SCB2 UART CTS, I2C SCL and SCB0 SPI select1 alternate functions."
      },
      {
        "number": "23",
        "name": "P0.1",
        "type": "bidirectional",
        "description": "GPIO port 0 bit 1 with low-power comparator negative input lpcomp.in_n[0], TCPWM trigger in[1], SCB2 UART RTS, I2C SDA and SCB0 SPI select2 alternate functions."
      },
      {
        "number": "24",
        "name": "P0.2",
        "type": "bidirectional",
        "description": "GPIO port 0 bit 2 with low-power comparator positive input lpcomp.in_p[1] and SCB0 SPI select3 alternate function."
      },
      {
        "number": "25",
        "name": "P0.3",
        "type": "bidirectional",
        "description": "GPIO port 0 bit 3 with low-power comparator negative input lpcomp.in_n[1] and SCB2 SPI select0 alternate function."
      },
      {
        "number": "26",
        "name": "P0.4",
        "type": "bidirectional",
        "description": "GPIO port 0 bit 4 with watch crystal oscillator input (wco.wco_in), SCB1/SCB2 UART RX, SCB1 I2C SCL and SPI MOSI alternate functions."
      },
      {
        "number": "27",
        "name": "P0.5",
        "type": "bidirectional",
        "description": "GPIO port 0 bit 5 with watch crystal oscillator output (wco.wco_out), SCB1/SCB2 UART TX, SCB1 I2C SDA and SPI MISO alternate functions."
      },
      {
        "number": "28",
        "name": "P0.6",
        "type": "bidirectional",
        "description": "GPIO port 0 bit 6 with external crystal oscillator input (exco.eco_in), external clock input (srss.ext_clk), SCB1 UART CTS and SPI clock alternate functions."
      },
      {
        "number": "29",
        "name": "P0.7",
        "type": "bidirectional",
        "description": "GPIO port 0 bit 7 with external crystal oscillator output (exco.eco_out), TCPWM line[0], SCB1 UART RTS and SPI select0 alternate functions."
      },
      {
        "number": "30",
        "name": "XRES",
        "type": "input",
        "description": "External reset input."
      },
      {
        "number": "31",
        "name": "VCCD",
        "type": "power_out",
        "description": "Regulated digital supply (1.8 V ± 5%); must be bypassed to ground with 0.1 µF (X5R ceramic or better) and not connected to anything else when the internal regulator is used."
      },
      {
        "number": "32",
        "name": "VSSD",
        "type": "power_in",
        "description": "Ground pin for the digital section."
      },
      {
        "number": "33",
        "name": "VDD",
        "type": "power_in",
        "description": "Single supply pin with VDDA and VDDD shorted inside the package; 1.8 V to 5.5 V in Mode 1, with 0.1 µF and 1 µF decoupling capacitors required."
      },
      {
        "number": "34",
        "name": "VSSA",
        "type": "power_in",
        "description": "Ground pin for the analog section."
      },
      {
        "number": "35",
        "name": "P1.0",
        "type": "bidirectional",
        "description": "GPIO port 1 bit 0 with opamp 0 positive input (ctb0_oa0+), Smart I/O[2].io[0], TCPWM line[2], SCB0 UART RX, I2C SCL and SPI MOSI alternate functions."
      },
      {
        "number": "36",
        "name": "P1.1",
        "type": "bidirectional",
        "description": "GPIO port 1 bit 1 with opamp 0 negative input (ctb0_oa0-), Smart I/O[2].io[1], TCPWM line_compl[2], SCB0 UART TX, I2C SDA and SPI MISO alternate functions."
      },
      {
        "number": "37",
        "name": "P1.2",
        "type": "bidirectional",
        "description": "GPIO port 1 bit 2 with opamp 0 output (ctb0_oa0_out), Smart I/O[2].io[2], TCPWM line[3], SCB0 UART CTS, TCPWM trigger in[2] and SPI clock alternate functions."
      },
      {
        "number": "38",
        "name": "P1.3",
        "type": "bidirectional",
        "description": "GPIO port 1 bit 3 with opamp 1 output (ctb0_oa1_out), Smart I/O[2].io[3], TCPWM line_compl[3], SCB0 UART RTS, TCPWM trigger in[3] and SPI select0 alternate functions."
      },
      {
        "number": "39",
        "name": "P1.4",
        "type": "bidirectional",
        "description": "GPIO port 1 bit 4 with opamp 1 negative input (ctb0_oa1-), Smart I/O[2].io[4], TCPWM line[6], SCB3 I2C SCL and SCB0 SPI select1 alternate functions."
      },
      {
        "number": "40",
        "name": "P1.7/VREF",
        "type": "bidirectional",
        "description": "GPIO port 1 bit 7 with opamp 1 positive input (ctb0_oa1+), SAR ADC external Vref (sar_ext_vref0/1), Smart I/O[2].io[7], TCPWM line_compl[7] and SCB2 SPI clock alternate functions."
      },
      {
        "number": "41",
        "name": "EP",
        "type": "passive",
        "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-sonnet-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: Package choice inferred from ordering table: CY8C4147LQS-S473 is marked for the 40-pin QFN column (3; Exposed pad is not listed in the provided pin tables or the 40-QFN pinout figure; it was not include; Pin types for VCCD (power_out) and XRES (input) are inferred from their described functions; the dat"
        ],
        "pages_sent": 28,
        "cost_usd": 0.3782,
        "at": "2026-10-26T18:41:06"
      },
      "datasheet": {
        "url": "https://www.infineon.com/dgdl/Infineon-Automotive_PSoC_4_PSoC_4100S_Plus_Datasheet_Programmable_System-on-Chip_(PSoC)-AdditionalTechnicalInformation-v14_00-EN.pdf?fileId=8ac78c8c7d0d8da4017d0ee7ff0b70e8&utm_source=cypress&utm_medium=referral&utm_campaign=",
        "pages": 71,
        "sha256": "5c4dbf6d4a457466",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 41,
        "described": 41,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "cy8c4147lqs-s473.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          6.0,
          1.0
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "e5b4286c2329085d9ef7f90d5eb5bf41a435241ecc1baaf1383823b6d6a946ae",
        "checked": "2026-10-26",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "cy8c4147lqs-s473-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          6.0,
          1.0
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "d48668243409f3b69047c98d31af097cb95c64b4d764edce8b20c74e54597808",
        "checked": "2026-10-26",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}