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CY8C4146AZI-S433

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Cypress Semicon CYPRESS, TQFP-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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CY8C4146AZI-S433

Cypress Semicon · CYPRESS · TQFP-48(7x7)

CY8C4146AZI-S433 from Cypress Semicon, in a TQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 P1.7/VREF bidirectional GPIO port 1 bit 7 with analog ctb0_oa1+, external SAR references sar_ext_vref0/1 and scb[2].spi_clk alternate function.
2 P2.0 bidirectional GPIO with sarmux[0], SmartIo[0].io[0], tcpwm.line[4]:0, csd.comp, scb[1] I2C SCL/SPI MOSI alternate functions.
3 P2.1 bidirectional GPIO with sarmux[1], SmartIo[0].io[1], tcpwm.line_compl[4]:0, scb[1] I2C SDA/SPI MISO alternate functions.
4 P2.2 bidirectional GPIO with sarmux[2], SmartIo[0].io[2] and scb[1].spi_clk:2 alternate function.
5 P2.3 bidirectional GPIO with sarmux[3], SmartIo[0].io[3] and scb[1].spi_select0:2 alternate function.
6 P2.4 bidirectional GPIO with sarmux[4], SmartIo[0].io[4], tcpwm.line[0]:1 and scb[1].spi_select1:1 alternate functions.
7 P2.5 bidirectional GPIO with sarmux[5], SmartIo[0].io[5], tcpwm.line_compl[0]:1 and scb[1].spi_select2:1 alternate functions.
8 P2.6 bidirectional GPIO with sarmux[6], SmartIo[0].io[6], tcpwm.line[1]:1 and scb[1].spi_select3:1 alternate functions.
9 P2.7 bidirectional GPIO with sarmux[7], SmartIo[0].io[7], tcpwm.line_compl[1]:1, lpcomp.comp[0]:1 and scb[2].spi_mosi alternate functions.
10 VSSD power_in Ground pin for the digital section.
11 NC unconnected No connect on the 48LD TQFP.
12 P3.0 bidirectional GPIO with SmartIo[1].io[0], tcpwm.line[0]:0, scb[1] UART RX/I2C SCL/SPI MOSI alternate functions.
13 P3.1 bidirectional GPIO with SmartIo[1].io[1], tcpwm.line_compl[0]:0, scb[1] UART TX/I2C SDA/SPI MISO alternate functions.
14 P3.2 bidirectional GPIO with SmartIo[1].io[2], tcpwm.line[1]:0, scb[1] UART CTS/SPI clock and cpuss.swd_data (SWD data) functions.
15 NC unconnected No connect on the 48LD TQFP.
16 P3.3 bidirectional GPIO with SmartIo[1].io[3], tcpwm.line_compl[1]:0, scb[1] UART RTS/SPI select0 and cpuss.swd_clk (SWD clock) functions.
17 P3.4 bidirectional GPIO with SmartIo[1].io[4], tcpwm.line[2]:0, tcpwm.tr_in[6] and scb[1].spi_select1:0 alternate functions.
18 P3.5 bidirectional GPIO with SmartIo[1].io[5], tcpwm.line_compl[2]:0 and scb[1].spi_select2:0 alternate functions.
19 P3.6 bidirectional GPIO with SmartIo[1].io[6], tcpwm.line[3]:0 and scb[1].spi_select3:0 alternate functions.
20 P3.7 bidirectional GPIO with SmartIo[1].io[7], tcpwm.line_compl[3]:0, lpcomp.comp[1]:1 and scb[2].spi_miso alternate functions.
21 VDDD power_in Power supply for the digital section.
22 P4.0 bidirectional GPIO with csd.vref_ext and scb[0] UART RX/I2C SCL/SPI MOSI alternate functions.
23 P4.1 bidirectional GPIO with csd.cshieldpads and scb[0] UART TX/I2C SDA/SPI MISO alternate functions.
24 P4.2 bidirectional GPIO with csd.cmodpad, scb[0] UART CTS/SPI clock and lpcomp.comp[0]:0 alternate functions.
25 P4.3 bidirectional GPIO with csd.csh_tank, scb[0] UART RTS/SPI select0 and lpcomp.comp[1]:0 alternate functions.
26 NC unconnected No connect on the 48LD TQFP.
27 NC unconnected No connect on the 48LD TQFP.
28 P0.0 bidirectional GPIO with lpcomp.in_p[0], tcpwm.tr_in[0], scb[2].i2c_scl:0 and scb[0].spi_select1:0 alternate functions.
29 P0.1 bidirectional GPIO with lpcomp.in_n[0], tcpwm.tr_in[1], scb[2].i2c_sda:0 and scb[0].spi_select2:0 alternate functions.
30 P0.2 bidirectional GPIO with lpcomp.in_p[1] and scb[0].spi_select3:0 alternate functions.
31 P0.3 bidirectional GPIO with lpcomp.in_n[1] and scb[2].spi_select0 alternate functions.
32 P0.4 bidirectional GPIO with wco.wco_in (32 kHz watch crystal), scb[1]/scb[2] UART RX, scb[1] I2C SCL and SPI MOSI alternate functions.
33 P0.5 bidirectional GPIO with wco.wco_out (32 kHz watch crystal), scb[1]/scb[2] UART TX, scb[1] I2C SDA and SPI MISO alternate functions.
34 P0.6 bidirectional GPIO with srss.ext_clk, scb[1].uart_cts:0, scb[2].uart_tx:1 and scb[1].spi_clk:1 alternate functions.
35 P0.7 bidirectional GPIO with tcpwm.line[0]:2, scb[1].uart_rts:0 and scb[1].spi_select0:1 alternate functions.
36 XRES input External reset input.
37 VCCD power_out Regulated digital supply (1.8 V ± 5%); must be bypassed to ground with an external 0.1 µF X5R or better capacitor and connected to nothing else in Mode 1.
38 VSSD power_in Ground pin for the digital section.
39 VDDD power_in Power supply for the digital section.
40 VDDA power_in Power supply for the analog section.
41 VSSA power_in Ground pin for the analog section.
42 P1.0 bidirectional GPIO with ctb0_oa0+ opamp input, tcpwm.line[2]:1, scb[0] UART RX/I2C SCL/SPI MOSI alternate functions.
43 P1.1 bidirectional GPIO with ctb0_oa0- opamp input, tcpwm.line_compl[2]:1, scb[0] UART TX/I2C SDA/SPI MISO alternate functions.
44 P1.2 bidirectional GPIO with ctb0_oa0_out opamp output, tcpwm.line[3]:1, tcpwm.tr_in[2], scb[0] UART CTS/SPI clock and scb[2].i2c_scl:1 functions.
45 P1.3 bidirectional GPIO with ctb0_oa1_out opamp output, tcpwm.line_compl[3]:1, tcpwm.tr_in[3], scb[0] UART RTS/SPI select0 and scb[2].i2c_sda:1 functions.
46 P1.4 bidirectional GPIO with ctb0_oa1- opamp input and scb[0].spi_select1:1 alternate function.
47 P1.5 bidirectional GPIO with ctb0_oa1+ opamp input and scb[0].spi_select2:1 alternate function.
48 P1.6 bidirectional GPIO with ctb0_oa0+ opamp input and scb[0].spi_select3:1 alternate function.

Key specifications

Parameter Value
Manufacturer Cypress Semicon
Package TQFP-48(7x7)
Category Embedded Processors & Controllers
Pins 48

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Digital supply relative to VSS VDDD_ABS -0.5 6 V 22
Direct digital core voltage input relative to VSS VCCD_ABS -0.5 1.95 V 22
GPIO voltage VGPIO_ABS -0.5 V max printed as VDD + 0.5 22
Maximum current per GPIO IGPIO_ABS -25 25 mA 22
GPIO injection current IGPIO_injection -0.5 0.5 mA Max for VIH > VDDD, Min for VIL < VSS; current injected per pin 22
ESD human body model ESD_HBM 2200 V 22
ESD charged device model ESD_CDM 500 V 22
Pin current for latch-up LU -140 140 mA 22
Power supply input voltage VDD 1.8 5.5 V Internally regulated supply 22
Power supply input voltage (VCCD = VDDD = VDDA) VDD 1.71 1.89 V Internally unregulated supply 22
Active supply current, CPU at 6 MHz IDD5 1.8 2.7 mA Execute from flash; CPU at 6 MHz; max at 85°C and 5.5 V 23
Active supply current, CPU at 24 MHz IDD8 3 4.75 mA Execute from flash; CPU at 24 MHz 23
Active supply current, CPU at 48 MHz IDD11 5.4 6.85 mA Execute from flash; CPU at 48 MHz 23
Sleep current, regulator on, 6 MHz IDD17 1.7 2.2 mA VDDD = 1.8 V to 5.5 V; I2C wakeup, WDT, and comparators on; 6 MHz; max at 85°C and 5.5 V 23
Sleep current, regulator on, 12 MHz IDD20 2.2 2.5 mA VDDD = 1.8 V to 5.5 V; I2C wakeup, WDT, and comparators on; 12 MHz; max at 85°C and 5.5 V 23
Sleep current, regulator bypassed, 6 MHz IDD23 0.7 0.9 mA VDDD = 1.71 V to 1.89 V; I2C wakeup, WDT, and comparators on; 6 MHz; max at 85°C and 5.5 V 23
Sleep current, regulator bypassed, 12 MHz IDD23A 1 1.2 mA VDDD = 1.71 V to 1.89 V; I2C wakeup, WDT, and comparators on; 12 MHz; max at 85°C and 5.5 V 23
Deep Sleep current, 1.8 V to 3.6 V IDD26 2.5 60 µA VDD = 1.8 V to 3.6 V, regulator on; I2C wakeup and WDT on; max at 3.6 V and 85°C 23
Deep Sleep current, 3.6 V to 5.5 V IDD29 2.5 60 µA VDD = 3.6 V to 5.5 V, regulator on; I2C wakeup and WDT on; max at 5.5 V and 85°C 23
Deep Sleep current, regulator bypassed IDD32 2.5 65 µA VDD = VCCD = 1.71 V to 1.89 V; I2C wakeup and WDT on; max at 1.89 V and 85°C 23
Supply current while XRES asserted IDD_XR 2 5 mA 23
CPU frequency FCPU 48 MHz 1.71 ≤ VDD ≤ 5.5; min printed as DC 23
SWDCLK frequency, 3.3 V to 5.5 V F_SWDCLK1 14 MHz 3.3 V ≤ VDD ≤ 5.5 V; SWDCLK ≤ 1/3 CPU clock frequency 41
SWDCLK frequency, 1.71 V to 3.3 V F_SWDCLK2 7 MHz 1.71 V ≤ VDD ≤ 3.3 V; SWDCLK ≤ 1/3 CPU clock frequency 41
SWDO hold time T_SWDO_HOLD 1 ns T = 1/f SWDCLK 41
IMO operating current at 48 MHz IIMO1 250 µA 41
IMO operating current at 24 MHz IIMO2 180 µA 41
IMO frequency variation at 24, 32, and 48 MHz (trimmed) FIMOTOL1 -2 2 % At -40°C to 85°C, for industrial temperature range 41
IMO startup time TSTARTIMO 7 µs 42
ILO operating current IILO1 0.3 1.05 µA 42
ILO startup time TSTARTILO1 2 ms 42
ILO duty cycle TILODUTY 40 50 60 % 42
ILO frequency range FILOTRIM1 20 40 80 kHz 42
WCO crystal frequency FWCO 32.768 kHz 42
WCO frequency tolerance FTOL 50 250 ppm With 20-ppm crystal 42
WCO equivalent series resistance ESR 50 kΩ 42
WCO drive level PD 1 µW 42
WCO startup time TSTART 500 ms 43
WCO crystal load capacitance CL 6 12.5 pF 43
WCO operating current (high power mode) IWCO1 8 mA 43
WCO operating current (low power mode) IWCO2 1 mA 43
External clock input frequency ExtClkFreq 0 48 MHz 43
External clock duty cycle ExtClkDuty 45 55 % Measured at VDD/2 43
System clock source switching time TCLKSWITCH 3 4 Periods 43
Max delay added by Smart I/O in Bypass mode PRG_BYPASS 1.6 ns 43
Operating ambient temperature TA -40 25 105 °C 49
Operating junction temperature TJ -40 125 °C 49
Package thermal resistance junction to ambient θJA 74.8 °C/W 48LD TQFP 49
Package thermal resistance junction to case θJC 35.7 °C/W 48LD TQFP 49

CAD (KiCad official)

  • Symbol: CY8C4146AZI-S433
  • Footprint: Package_QFP:TQFP-48_7x7mm_P0.5mm
  • 3D model: TQFP-48(7x7) (KiCad packages3D, STEP)
  • 3D model files: cy8c4146azi-s433-etched.step / cy8c4146azi-s433-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cy8c4146azi-s433.step / cy8c4146azi-s433.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Cypress Semicon datasheet (66 pp, sha256 077139eb014776df, retrieved 2026-10-23, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF