component
CY8C4025AXI-S412
Public Made by Adomby adom
Cypress Semicon Microcontroller Units (MCUs/MPUs/SOCs), TQFP-32(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338
{
"slug": "cy8c4025axi-s412",
"version": "0.1.0",
"type": "component",
"description": "Cypress Semicon Microcontroller Units (MCUs/MPUs/SOCs), TQFP-32(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"tags": [
"component",
"single chip microcomputer-microcontroller",
"cy8c4025axi-s412",
"factory-2.0.0",
"extractor-text"
],
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"cy8c4025axi-s412.kicad_sym",
"cy8c4025axi-s412.kicad_mod",
"cy8c4025axi-s412.glb",
"cy8c4025axi-s412.step",
"cy8c4025axi-s412.lbr",
"docs/hero.png",
"docs/cy8c4025axi-s412-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html",
"cy8c4025axi-s412-hero.glb",
"cy8c4025axi-s412-hero.overlay.json",
"cy8c4025axi-s412-etched.glb"
],
"component": {
"mpn": "CY8C4025AXI-S412",
"manufacturer": "Cypress Semicon",
"package": "TQFP-32(7x7)",
"pin_count": 32,
"category": "Single Chip Microcomputer/Microcontroller",
"subcategory": "Microcontroller Units (MCUs/MPUs/SOCs)",
"datasheet": "https://www.infineon.com/dgdl/Infineon-PSoC_4_PSoC_4000S_Datasheet_Programmable_System-on-Chip_(PSoC_)-DataSheet-v16_00-EN.pdf?fileId=8ac78c8c7d0d8da4017d0eda97715cf1",
"parts": {
"symbol": "cy8c4025axi-s412.kicad_sym",
"footprint": "cy8c4025axi-s412.kicad_mod",
"model_3d": "cy8c4025axi-s412-hero.glb",
"model_3d_plain": "cy8c4025axi-s412-etched.glb",
"model_3d_step": "cy8c4025axi-s412-etched.step",
"model_3d_step_plain": "cy8c4025axi-s412.step",
"lbr": "cy8c4025axi-s412.lbr"
},
"distributor_links": {
"lcsc": "C2948487",
"digikey": "448-CY8C4025AXI-S412-ND",
"mouser": "727-CY8C4025AXI-S412"
},
"distributor_check": {
"checked_at": "2026-10-27T00:31:47Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": "448-CY8C4025AXI-S412-ND",
"status": "found"
},
"mouser": {
"pn": "727-CY8C4025AXI-S412",
"status": "found"
}
},
"pins": [
{
"number": "1",
"name": "P1.7",
"type": "bidirectional",
"description": "GPIO port pin P1.7; all port pins support GPIO and can be configured as CAPSENSE, analog, or digital."
},
{
"number": "2",
"name": "P2.0",
"type": "bidirectional",
"description": "GPIO port pin P2.0; all port pins support GPIO and can be configured as CAPSENSE, analog, or digital."
},
{
"number": "3",
"name": "P2.1",
"type": "bidirectional",
"description": "GPIO port pin P2.1; all port pins support GPIO and can be configured as CAPSENSE, analog, or digital."
},
{
"number": "4",
"name": "P2.2",
"type": "bidirectional",
"description": "GPIO port pin P2.2; all port pins support GPIO and can be configured as CAPSENSE, analog, or digital."
},
{
"number": "5",
"name": "P2.3",
"type": "bidirectional",
"description": "GPIO port pin P2.3; all port pins support GPIO and can be configured as CAPSENSE, analog, or digital."
},
{
"number": "6",
"name": "P2.5",
"type": "bidirectional",
"description": "GPIO port pin P2.5; all port pins support GPIO and can be configured as CAPSENSE, analog, or digital."
},
{
"number": "7",
"name": "P2.6",
"type": "bidirectional",
"description": "GPIO port pin P2.6; all port pins support GPIO and can be configured as CAPSENSE, analog, or digital."
},
{
"number": "8",
"name": "P2.7",
"type": "bidirectional",
"description": "GPIO port pin P2.7; all port pins support GPIO and can be configured as CAPSENSE, analog, or digital."
},
{
"number": "9",
"name": "P3.0",
"type": "bidirectional",
"description": "GPIO port pin P3.0; all port pins support GPIO and can be configured as CAPSENSE, analog, or digital."
},
{
"number": "10",
"name": "P3.1",
"type": "bidirectional",
"description": "GPIO port pin P3.1; all port pins support GPIO and can be configured as CAPSENSE, analog, or digital."
},
{
"number": "11",
"name": "P3.2",
"type": "bidirectional",
"description": "GPIO port pin P3.2; all port pins support GPIO and can be configured as CAPSENSE, analog, or digital."
},
{
"number": "12",
"name": "P3.3",
"type": "bidirectional",
"description": "GPIO port pin P3.3; all port pins support GPIO and can be configured as CAPSENSE, analog, or digital."
},
{
"number": "13",
"name": "P4.0",
"type": "bidirectional",
"description": "GPIO port pin P4.0; all port pins support GPIO and can be configured as CAPSENSE, analog, or digital."
},
{
"number": "14",
"name": "P4.1",
"type": "bidirectional",
"description": "GPIO port pin P4.1; all port pins support GPIO and can be configured as CAPSENSE, analog, or digital."
},
{
"number": "15",
"name": "P4.2",
"type": "bidirectional",
"description": "GPIO port pin P4.2; all port pins support GPIO and can be configured as CAPSENSE, analog, or digital."
},
{
"number": "16",
"name": "P4.3",
"type": "bidirectional",
"description": "GPIO port pin P4.3; all port pins support GPIO and can be configured as CAPSENSE, analog, or digital."
},
{
"number": "17",
"name": "P0.0",
"type": "bidirectional",
"description": "GPIO port pin P0.0; all port pins support GPIO and can be configured as CAPSENSE, analog, or digital."
},
{
"number": "18",
"name": "P0.1",
"type": "bidirectional",
"description": "GPIO port pin P0.1; all port pins support GPIO and can be configured as CAPSENSE, analog, or digital."
},
{
"number": "19",
"name": "P0.2",
"type": "bidirectional",
"description": "GPIO port pin P0.2; all port pins support GPIO and can be configured as CAPSENSE, analog, or digital."
},
{
"number": "20",
"name": "P0.3",
"type": "bidirectional",
"description": "GPIO port pin P0.3; all port pins support GPIO and can be configured as CAPSENSE, analog, or digital."
},
{
"number": "21",
"name": "P0.4",
"type": "bidirectional",
"description": "GPIO port pin P0.4; all port pins support GPIO and can be configured as CAPSENSE, analog, or digital."
},
{
"number": "22",
"name": "P0.5",
"type": "bidirectional",
"description": "GPIO port pin P0.5; all port pins support GPIO and can be configured as CAPSENSE, analog, or digital."
},
{
"number": "23",
"name": "P0.6",
"type": "bidirectional",
"description": "GPIO port pin P0.6; all port pins support GPIO and can be configured as CAPSENSE, analog, or digital."
},
{
"number": "24",
"name": "XRES",
"type": "input",
"description": "External reset pin listed in the pin table; the provided pages give no electrical limits for it."
},
{
"number": "25",
"name": "VCCD",
"type": "power_out",
"description": "Regulated digital supply (1.8 V ± 5%) that must be bypassed to ground via an external 0.1 µF X5R ceramic or better capacitor and must not be connected to anything else."
},
{
"number": "26",
"name": "VSSD",
"type": "power_in",
"description": "Ground pin for the digital section."
},
{
"number": "27",
"name": "VDD",
"type": "power_in",
"description": "Power supply to all sections of the chip; 1.8 V to 5.5 V in Mode 1 and 1.71 V to 1.89 V in Mode 2 with the internal regulator bypassed."
},
{
"number": "28",
"name": "VSSA",
"type": "power_in",
"description": "Ground pin for the analog section."
},
{
"number": "29",
"name": "P1.0",
"type": "bidirectional",
"description": "GPIO port pin P1.0; all port pins support GPIO and can be configured as CAPSENSE, analog, or digital."
},
{
"number": "30",
"name": "P1.1",
"type": "bidirectional",
"description": "GPIO port pin P1.1; all port pins support GPIO and can be configured as CAPSENSE, analog, or digital."
},
{
"number": "31",
"name": "P1.2",
"type": "bidirectional",
"description": "GPIO port pin P1.2; all port pins support GPIO and can be configured as CAPSENSE, analog, or digital."
},
{
"number": "32",
"name": "P1.3",
"type": "bidirectional",
"description": "GPIO port pin P1.3; all port pins support GPIO and can be configured as CAPSENSE, analog, or digital."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: The 32-pin TQFP column lists pin 27 as VDD, but the table maps both VDDD and VDDA to pin 27 in the 3; The provided pages do not give a functional description or electrical limits for XRES, so its descri"
],
"pages_sent": 19,
"cost_usd": 0.0435,
"at": "2026-10-27T00:30:52"
},
"datasheet": {
"url": "https://www.infineon.com/dgdl/Infineon-PSoC_4_PSoC_4000S_Datasheet_Programmable_System-on-Chip_(PSoC_)-DataSheet-v16_00-EN.pdf?fileId=8ac78c8c7d0d8da4017d0eda97715cf1",
"pages": 58,
"sha256": "493ab905a29a5d98",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 32,
"described": 32,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "cy8c4025axi-s412.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
9.0,
9.0,
1.1
],
"zmin_mm": -0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "53431be61c684e9d923915676a90cb08050c23ee3f834d76a77a3b19b41422f1",
"checked": "2026-10-27",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "cy8c4025axi-s412-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
9.0,
9.0,
1.1
],
"zmin_mm": -0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "10b6b9b405a32f9fca508b41812730f550f7ec551fdfe0c95e941e6ae2bc17a9",
"checked": "2026-10-27",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
}
}