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CY8C4014SXI-420T

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Cypress Semicon Microcontroller Units (MCUs/MPUs/SOCs), SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentsingle chip microcomputer-microcontrollercy8c4014sxi-420tfactory-2.0.0extractor-text

Changed since verified CY8C4014SXI-420T

by Ray · last 30 Oct 2026 · 1 record · files changed since
SymbolFootprint3D modelPins

Verification log 1 record

30 Oct 2026RayPublished by the parts factory: tier mfr, 8 pinschanged since
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: CY8C4014SXI-420T · SOIC-8 · 8 pins
  • ✓copper: 8 copper pads, none touching another net
  • ✓datasheet: all 8 pin names found in the 36-page datasheet
  • ✓distributor: lcsc C2952473, digikey 448-CY8C4014SXI-420TTR-ND, mouser 727-CY8C4014SXI-420T
  • ✓family: SOIC-8_3.9x4.9mm_P1.27mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-p4s0yecs/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 8 pins = 8 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 8 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files! cy8c4014sxi-420t.kicad_sym✓ cy8c4014sxi-420t.kicad_mod✓ cy8c4014sxi-420t.step
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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray
viewers cy8c4014sxi-420t: symbol repaired (body fitted to the names) · Ray
cy8c4014sxi-420t-etched.glb Publish 0.1.0 · Ray
cy8c4014sxi-420t-etched.step cy8c4014sxi-420t: factory component page (tier=mfr) · Ray
cy8c4014sxi-420t-hero.glb cy8c4014sxi-420t: hero GLB from the etched model (keeps the MPN mark) · Ray
cy8c4014sxi-420t-hero.overlay.json Publish 0.1.0 · Ray
cy8c4014sxi-420t.glb Publish 0.1.0 · Ray
cy8c4014sxi-420t.kicad_mod Publish 0.1.0 · Ray
cy8c4014sxi-420t.kicad_sym cy8c4014sxi-420t: symbol repaired (body fitted to the names) · Ray
cy8c4014sxi-420t.lbr cy8c4014sxi-420t: symbol repaired (body fitted to the names) · Ray
cy8c4014sxi-420t.step Publish 0.1.0 · Ray
package.json Publish 0.1.0 · Ray
page.json Set visibility: public · Ray
README.md Publish 0.1.0 · Ray
verification.json Verified: Published by the parts factory: tier mfr, 8 pins · Ray

CY8C4014SXI-420T

Cypress Semicon · Microcontroller Units (MCUs/MPUs/SOCs) · SOIC-8

CY8C4014SXI-420T from Cypress Semicon, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 P3.1/SCL/SWD_CLK bidirectional Port 3 GPIO pin 1 with I2C clock (SCL) alternate function and SWD clock (SWD_CLK) for programming and debug.
2 P0.4/TRIN4/CMPO_0/EXT_CLK bidirectional Port 0 GPIO pin 4 (CapSense-capable) with TCPWM trigger input 4, comparator output CMPO_0, external clock input and CMOD capacitor connection.
3 VCCD power_out Regulated digital supply (1.8 V ±5%) that must be bypassed to ground with a 0.1 µF X5R ceramic or better capacitor placed close to the pin.
4 VDD power_in Power supply for both analog and digital sections, 1.8 V to 5.5 V unregulated or 1.71 V to 1.89 V regulated (shorted to VCCD), bypassed to ground.
5 VSS power_in Ground pin.
6 P1.1/OUT0 bidirectional Port 1 GPIO pin 1 (CapSense-capable) with TCPWM PWM output OUT0.
7 P1.6/OVF0/UND0/nOUT0/CMPO_0 bidirectional Port 1 GPIO pin 6 with TCPWM overflow, underflow and complementary output nOUT0, and comparator output/internal reset function that must not have a load to ground during POR (should be an output).
8 P3.0/SDA/SWD_IO bidirectional Port 3 GPIO pin 0 with I2C data (SDA) alternate function and SWD I/O for programming and debug.

Key specifications

Parameter Value
Manufacturer Cypress Semicon
Package SOIC-8
Category Single Chip Microcomputer/Microcontroller
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Digital supply relative to VSS VDD_ABS -0.5 6 V 14
Direct digital core voltage input relative to VSS VCCD_ABS -0.5 1.95 V 14
Maximum current per GPIO IGPIO_ABS -25 25 mA 14
GPIO injection current IGPIO_injection -0.5 0.5 mA Current injected per pin 14
ESD human body model ESD_HBM 2200 V 14
ESD charged device model ESD_CDM 500 V 14
Pin current for latch-up LU -140 140 mA 14
Power supply input voltage VDD 1.8 5.5 V With regulator enabled 14
Power supply input voltage (VCCD = VDD) VDD 1.71 1.89 V Internally unregulated supply 14
VDDIO domain supply minimum VDDIO 1.71 V Max is VDD 14
Operating ambient temperature TA -40 25 85 °C 26
Operating junction temperature TJ -40 100 °C 26
Active current, CPU at 6 MHz IDD5 2 2.85 mA Execute from flash; VDD = 1.8 to 5.5 V 14
Active current, CPU at 12 MHz IDD8 3.2 3.75 mA Execute from flash; VDD = 1.8 to 5.5 V 14
Active current, CPU at 16 MHz IDD11 4 4.5 mA Execute from flash; VDD = 1.8 to 5.5 V 14
Deep Sleep current, regulator on IDD26 2.5 8.2 µA I2C wakeup and WDT on; VDD = 1.8 to 3.6 V 14
Deep Sleep current, regulator on IDD29 2.5 12 µA I2C wakeup and WDT on; VDD = 3.6 to 5.5 V 15
Deep Sleep current, regulator bypassed IDD32 2.5 9.2 µA I2C wakeup and WDT on; VDD = VCCD = 1.71 to 1.89 V 15
Supply current while XRES asserted IDD_XR 2 5 mA 15
Sleep current, 6 MHz IDD20 1.1 mA I2C wakeup, WDT on. 6 MHz; VDD = 1.71 to 5.5 V 14
Sleep current, 12 MHz IDD20A 1.4 mA I2C wakeup, WDT on. 12 MHz; VDD = 1.71 to 5.5 V 14
CPU frequency FCPU 0 16 MHz 1.71 VDD 5.5 15
Wakeup from Deep Sleep mode TDEEPSLEEP 35 µs 15
LVTTL input high threshold VIH 2 V LVTTL input, VDD ≥ 2.7 V 15
LVTTL input low threshold VIL 0.8 V LVTTL input, VDD ≥ 2.7 V 15
Output voltage low level VOL 0.6 V IOL = 4 mA at 1.8 V VDD 15
Output voltage low level VOL 0.4 V IOL = 3 mA at 3 V VDD 15
Pull-up resistor RPULLUP 3.5 5.6 8.5 kΩ 15
Pull-down resistor RPULLDOWN 3.5 5.6 8.5 kΩ 15
Input leakage current (absolute value) IIL 2 nA 25 °C, VDD = 3.0 V 15
Input capacitance CIN 3 7 pF 15
Comparator response time, High Bandwidth TCOMP1 90 ns 50-mV overdrive 18
Comparator response time, Low Power TCOMP2 110 ns 50-mV overdrive 18
Max allowed ripple on power supply VDD_RIPPLE -50 50 mV DC to 10 MHz; VDD > 2V (with ripple), 25 °C TA, Sensitivity = 0.1 pF 18
Max allowed ripple on power supply VDD_RIPPLE_1.8 -25 25 mV DC to 10 MHz; VDD > 1.75V (with ripple), 25 C TA, Parasitic Capacitance (CP) < 20 pF, Sensitivity ≥ 0.4 pF 18
Reference Buffer Output VREFHI 1.1 1.2 1.3 V 18
IDAC1 (8-bits) block current IDAC1IDD 1125 µA 18
IDAC2 (7-bits) block current IDAC2IDD 1125 µA 18
CSD voltage range of operation VCSD 1.71 5.5 V 1.8 V ±5% or 1.8 V to 5.5 V 18
IDAC1 DNL IDAC1DNL -1 1 LSB DNL for 8-bit resolution 18
IDAC1 INL IDAC1INL -3 3 LSB INL for 8-bit resolution 18
IDAC2 DNL IDAC2DNL -1 1 LSB DNL for 7-bit resolution 18
IDAC2 INL IDAC2INL -3 3 LSB INL for 7-bit resolution 18
CapSense SNR SNR 5 Ratio Capacitance range of 9 to 35 pF, 0.1 pF sensitivity 18
IDAC offset IDACOFFSET -1 1 LSB All zeroes input 18
IDAC gain error IDACGAIN -10 10 % Full-scale error less offset 18
Mismatch between IDACs IDACMISMATCH 7 LSB 18
8-bit IDAC settling time IDACSET8 10 µs Full-scale transition. No external load. 18
7-bit IDAC settling time IDACSET7 10 µs Full-scale transition. No external load. 18
External modulator capacitor CMOD 2.2 nF 5-V rating, X7R or NP0 cap. 18
ADC gain error ADCError 1 % For 0 to 5-V range, 0.1% accurate Rin / Rbleed,1% accurate Internal Vref and Temp range of 0 to 70 °C 19
ADC offset error ADCOffset 50 mV 19
ADC integral non-linearity ADCINL 18 mV 0 to 5-V input and 0 to 70 °C 19
ADC differential non-linearity ADCDNL 12 mV 0 to 5-V input and 0 to 70 °C 19
ADC sample rate ADCSamp 58 sps 19
TCPWM block current at 3 MHz ITCPWM1 45 μA All modes (TCPWM) 20
TCPWM block current at 8 MHz ITCPWM2 145 μA All modes (TCPWM) 20
TCPWM block current at 16 MHz ITCPWM3 160 μA All modes (TCPWM) 20
I2C block current at 100 kHz II2C1 25 µA 20
I2C block current at 400 kHz II2C2 135 µA 20
I2C enabled in Deep Sleep mode ISBI2C 2.5 µA 20
I2C bit rate FI2C1 400 Kbps 20
External clock input frequency ExtClkFreq 0 16 MHz 23
External clock duty cycle ExtClkDuty 45 55 % measured at VDD/2 23
Package θJA (8-pin SOIC) TJA 198 °C/Watt 26
Package θJC (8-pin SOIC) TJC 56.9 °C/Watt 26

CAD (KiCad official)

  • Symbol: CY8C4014SXI-420T
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: cy8c4014sxi-420t-etched.step / cy8c4014sxi-420t-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cy8c4014sxi-420t.step / cy8c4014sxi-420t.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Cypress Semicon datasheet (36 pp, sha256 6c7edf8ac0f0328f, retrieved 2026-10-30, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF