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CY8C24423A-24LTXI

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Cypress Semicon Microcontroller Units (MCUs/MPUs/SOCs), QFN-32(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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CY8C24423A-24LTXI

Cypress Semicon · Microcontroller Units (MCUs/MPUs/SOCs) · QFN-32(5x5)

CY8C24423A-24LTXI from Cypress Semicon, in a QFN-32(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 P2[7] bidirectional Port 2 bit 7 general-purpose digital I/O.
2 P2[5] bidirectional Port 2 bit 5 general-purpose digital I/O.
3 P2[3] bidirectional Port 2 bit 3 digital I/O with analog capability; direct switched capacitor block input.
4 P2[1] bidirectional Port 2 bit 1 digital I/O with analog capability; direct switched capacitor block input.
5 VSS power_in Ground connection.
6 SMP passive Switch mode pump connection to external components, which are required.
7 P1[7] bidirectional Port 1 bit 7 digital I/O; I2C SCL.
8 P1[5] bidirectional Port 1 bit 5 digital I/O; I2C SDA.
9 NC unconnected No connection; pin must be left floating.
10 P1[3] bidirectional Port 1 bit 3 general-purpose digital I/O.
11 P1[1] bidirectional Port 1 bit 1 digital I/O; XTALin, I2C SCL, ISSP-SCLK (ISSP pin, not high Z at POR).
12 VSS power_in Ground connection.
13 P1[0] bidirectional Port 1 bit 0 digital I/O; XTALout, I2C SDA, ISSP-SDATA (ISSP pin, not high Z at POR).
14 P1[2] bidirectional Port 1 bit 2 general-purpose digital I/O.
15 P1[4] bidirectional Port 1 bit 4 digital I/O; optional external clock input (EXTCLK).
16 NC unconnected No connection; pin must be left floating.
17 P1[6] bidirectional Port 1 bit 6 general-purpose digital I/O.
18 XRES input Active high external reset with internal pull-down.
19 P2[0] bidirectional Port 2 bit 0 digital I/O with analog capability; direct switched capacitor block input.
20 P2[2] bidirectional Port 2 bit 2 digital I/O with analog capability; direct switched capacitor block input.
21 P2[4] bidirectional Port 2 bit 4 digital I/O; external analog ground (AGND).
22 P2[6] bidirectional Port 2 bit 6 digital I/O; external voltage reference (VREF).
23 P0[0] bidirectional Port 0 bit 0 digital I/O; analog column mux input.
24 P0[2] bidirectional Port 0 bit 2 digital I/O; analog column mux input.
25 NC unconnected No connection; pin must be left floating.
26 P0[4] bidirectional Port 0 bit 4 digital I/O; analog column mux input.
27 P0[6] bidirectional Port 0 bit 6 digital I/O; analog column mux input.
28 VDD power_in Supply voltage.
29 P0[7] bidirectional Port 0 bit 7 digital I/O; analog column mux input.
30 P0[5] bidirectional Port 0 bit 5 digital I/O; analog column mux input and column output.
31 P0[3] bidirectional Port 0 bit 3 digital I/O; analog column mux input and column output.
32 P0[1] bidirectional Port 0 bit 1 digital I/O; analog column mux input.
33 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Cypress Semicon
Package QFN-32(5x5)
Category Single Chip Microcomputer/Microcontroller
Pins 33

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Storage temperature TSTG -55 25 100 °C 18
Ambient temperature with power applied TA -40 85 °C 18
Supply voltage on VDD relative to VSS VDD -0.5 6 V 18
Maximum current into any port pin IMIO -25 50 mA 18
Electrostatic discharge voltage ESD 2000 V Human body model ESD 18
Latch up current LU 200 mA 18
Bake temperature TBAKETEMP 125 °C 18
Bake time tBAKETIME 72 Hours 18
Ambient temperature TA -40 85 °C 19
Junction temperature TJ -40 100 °C 19
Supply voltage VDD 2.4 5.25 V 19
Supply current IDD 5 8 mA VDD = 5.0 V, TA = 25 °C, CPU = 3 MHz, IMO = 24 MHz 19
Supply current IDD3 3.3 6 mA VDD = 3.3 V, TA = 25 °C, CPU = 3 MHz, IMO = 24 MHz 19
Supply current IDD27 2 4 mA VDD = 2.7 V, TA = 25 °C, CPU = 0.75 MHz, IMO = 6 MHz 19
Sleep current ISB 3 6.5 µA VDD = 3.3 V, -40 °C ≤ TA ≤ 55 °C, analog power = off 19
Sleep current at high temperature ISBH 4 25 µA VDD = 3.3 V, 55 °C < TA ≤ 85 °C, analog power = off 19
Sleep current with external crystal ISBXTL 4 7.5 µA VDD = 3.3 V, -40 °C ≤ TA ≤ 55 °C, analog power = off 19
Sleep current with external crystal at high temperature ISBXTLH 5 26 µA VDD = 3.3 V, 55 °C < TA ≤ 85 °C, analog power = off 19
Reference voltage (Bandgap) VREF 1.28 1.3 1.32 V VDD > 3.0 V 19
Reference voltage (Bandgap) VREF27 1.16 1.3 1.32 V VDD = 2.4 V to 3.0 V 19
Pull-up resistor RPU 4 5.6 8 kΩ 20
Pull-down resistor RPD 4 5.6 8 kΩ 20
Low output level (5 V/3.3 V) VOL 0.75 V IOL = 25 mA, VDD = 4.75 to 5.25 V 20
High level source current (5 V/3.3 V) IOH 10 mA VOH = VDD, 1.0 V 20
Low level sink current (5 V/3.3 V) IOL 25 mA VOL = 0.75 V 20
Input low level (5 V/3.3 V) VIL 0.8 V VDD = 3.0 to 5.25 20
Input high level (5 V/3.3 V) VIH 2.1 V VDD = 3.0 to 5.25 20
Input hysteresis (5 V/3.3 V) VH 60 mV 20
Capacitive load on pins as input CIN 3.5 10 pF Temp = 25 °C 20
Capacitive load on pins as output COUT 3.5 10 pF Temp = 25 °C 20
Low output level (2.7 V) VOL 0.75 V IOL = 11.25 mA, VDD = 2.4 to 3.0 V 20
High level source current (2.7 V) IOH 2 mA VOH = VDD, 0.4 20
Input low level (2.7 V) VIL 0.75 V VDD = 2.4 to 3.0 20
Input high level (2.7 V) VIH 2 V VDD = 2.4 to 3.0 20
Low level sink current (2.7 V) IOL 11.25 mA VOL = .75 20
Input hysteresis (2.7 V) VH 90 mV 20
Average input offset voltage drift (5 V opamp) TCVOSOA 7 35 µV/°C 21
Supply voltage rejection ratio (5 V opamp) PSRROA 64 80 dB 21
LPC reference voltage range VREFLPC 0.2 V 23
LPC supply current ISLPC 10 40 µA 23
LPC voltage offset VOSLPC 2.5 30 mV 23
VDD for programming and erase VDDP 4.5 5 5.5 V 36
Flash endurance (per block) FlashENPB 50000 Erase/write cycles per block 36
Flash data retention FlashDR 10 Years 36
IMO frequency for 24 MHz FIMO24 22.8 24 25.2 MHz SLIMO mode = 0 37
IMO frequency for 6 MHz FIMO6 5.5 6 6.5 MHz SLIMO mode = 1 37
ILO frequency F32K1 15 32 64 kHz 37
Programming SCLK frequency FSCLK 0 8 MHz 49

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
housing PC The emulator consists of a base unit that connects to the PC 8

CAD (KiCad official)

  • Symbol: CY8C24423A-24LTXI
  • Footprint: Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm
  • 3D model: QFN-32(5x5) (KiCad packages3D, STEP)
  • 3D model files: cy8c24423a-24ltxi-etched.step / cy8c24423a-24ltxi-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cy8c24423a-24ltxi.step / cy8c24423a-24ltxi.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Cypress Semicon datasheet (71 pp, sha256 96046f32dbd7d49d, retrieved 2026-10-26, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF