CY8C24123A-24SXI from Cypress Semicon, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	P0[5]	bidirectional	General-purpose I/O pin that serves as an analog column mux input and column output.
2	P0[3]	bidirectional	General-purpose I/O pin that serves as an analog column mux input and column output.
3	P1[1]	bidirectional	General-purpose I/O pin that serves as crystal input (XTALin), I2C serial clock (SCL) and ISSP-SCLK, which is not high Z at POR.
4	VSS	power_in	Ground connection.
5	P1[0]	bidirectional	General-purpose I/O pin that serves as crystal output (XTALout), I2C serial data (SDA) and ISSP-SDATA, which is not high Z at POR.
6	P0[2]	bidirectional	General-purpose I/O pin that serves as an analog column mux input.
7	P0[4]	bidirectional	General-purpose I/O pin that serves as an analog column mux input.
8	VDD	power_in	Supply voltage.

Key specifications

Parameter	Value
Manufacturer	Cypress Semicon
Package	SOIC-8
Category	Single Chip Microcomputer/Microcontroller
Pins	8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Storage temperature	TSTG	-55	25	100	°C	Higher storage temperatures reduce data retention time	18
Ambient temperature with power applied	TA	-40		85	°C		18
Supply voltage on VDD relative to VSS	VDD	-0.5		6	V		18
Maximum current into any port pin	IMIO	-25		50	mA		18
Electrostatic discharge voltage	ESD	2000			V	Human body model ESD	18
Latch up current	LU			200	mA		18
Ambient temperature	TA	-40		85	°C		19
Junction temperature	TJ	-40		100	°C		19
Supply voltage	VDD	2.4		5.25	V		19
Supply current	IDD		5	8	mA	VDD = 5.0 V, TA = 25 °C, CPU = 3 MHz, SLIMO mode = 0, IMO = 24 MHz	19
Supply current	IDD3		3.3	6	mA	VDD = 3.3 V, TA = 25 °C, CPU = 3 MHz, SLIMO mode = 0, IMO = 24 MHz	19
Supply current	IDD27		2	4	mA	VDD = 2.7 V, TA = 25 °C, CPU = 0.75 MHz, SLIMO mode = 1, IMO = 6 MHz	19
Sleep (mode) current with POR, LVD, sleep timer, and WDT	ISB		3	6.5	µA	VDD = 3.3 V, -40 °C ≤ TA ≤ 55 °C, analog power = off	19
Sleep current at high temperature	ISBH		4	25	µA	VDD = 3.3 V, 55 °C < TA ≤ 85 °C, analog power = off	19
Sleep current with external crystal	ISBXTL		4	7.5	µA	VDD = 3.3 V, -40 °C ≤ TA ≤ 55 °C, analog power = off	19
Sleep current with external crystal at high temperature	ISBXTLH		5	26	µA	VDD = 3.3 V, 55 °C < TA ≤ 85 °C, analog power = off	19
Reference voltage (Bandgap)	VREF	1.28	1.3	1.32	V	VDD > 3.0 V	19
Reference voltage (Bandgap)	VREF27	1.16	1.3	1.32	V	VDD = 2.4 V to 3.0 V	19
Pull-up resistor	RPU	4	5.6	8	kΩ		20
Pull-down resistor	RPD	4	5.6	8	kΩ		20
Low output level (5 V / 3.3 V)	VOL			0.75	V	IOL = 25 mA, VDD = 4.75 to 5.25 V	20
High level source current (5 V / 3.3 V)	IOH	10			mA	VOH = VDD, 1.0 V	20
Low level sink current (5 V / 3.3 V)	IOL	25			mA	VOL = 0.75 V	20
Input low level (5 V / 3.3 V)	VIL			0.8	V	VDD = 3.0 to 5.25	20
Input high level (5 V / 3.3 V)	VIH	2.1			V	VDD = 3.0 to 5.25	20
Capacitive load on pins as input	CIN		3.5	10	pF	Package and pin dependent. Temp = 25 °C	20
Capacitive load on pins as output	COUT		3.5	10	pF	Package and pin dependent. Temp = 25 °C	20
Low output level (2.7 V)	VOL			0.75	V	IOL = 11.25 mA, VDD = 2.4 to 3.0 V	20
High level source current (2.7 V)	IOH	2			mA	VOH = VDD, 0.4	20
Input low level (2.7 V)	VIL			0.75	V	VDD = 2.4 to 3.0	20
Input high level (2.7 V)	VIH	2			V	VDD = 2.4 to 3.0	20
Low level sink current (2.7 V)	IOL	11.25			mA	VOL = .75	20
Input hysteresis (5 V / 3.3 V)	VH		60		mV		20
Input hysteresis (2.7 V)	VH		90		mV		20
Input leakage (absolute value)	IIL		1		nA	Gross tested to 1 µA	20
Average input offset voltage drift (5 V opamp)	TCVOSOA		7	35	µV/°C		21
Supply voltage rejection ratio (5 V opamp)	PSRROA	64	80		dB	VSS ≤ VIN ≤ (VDD, 2.25) or (VDD, 1.25 V) ≤ VIN ≤ VDD	21
LPC supply current	ISLPC		10	40	µA		23
LPC voltage offset	VOSLPC		2.5	30	mV		23
VDD for programming and erase	VDDP	4.5	5	5.5	V		36
Supply voltage for flash write operation	VDDIWRITE	2.7		5.25	V		36
Supply current during programming or verify	IDDP		5	25	mA		36
Flash endurance (per block)	FlashENPB	50000			cycles	Erase/write cycles per block	36
Flash endurance (total)	FlashENT	1.8e+06			cycles	Erase/write cycles	36
Flash data retention	FlashDR	10			Years		36
IMO frequency for 24 MHz	FIMO24	22.8	24	25.2	MHz	Trimmed for 5 V or 3.3 V operation, SLIMO mode = 0	37
IMO frequency for 6 MHz	FIMO6	5.5	6	6.5	MHz	Trimmed for 5 V or 3.3 V operation, SLIMO mode = 1	37
CPU frequency (5 V nominal)	FCPU1	0.937	24	24.6	MHz	SLIMO mode = 0	37
CPU frequency (3.3 V nominal)	FCPU2	0.937	12	12.3	MHz	SLIMO mode = 0	37
ILO frequency	F32K1	15	32	64	kHz		37
ILO untrimmed frequency	F32K_U	5		100	kHz	After a reset and before the M8C starts to run	37
PLL lock time	TPLLSLEW	0.5		10	ms		37
External reset pulse width	tXRST	10			µs		37
24 MHz duty cycle	DC24M	40	50	60	%		38
Power supply slew rate	SRPOWER_UP			250	V/ms	VDD slew rate during power-up	38
Time from end of POR to CPU executing code	tPOWERUP		16	100	ms	Power-up from 0 V	38
Frequency of SCLK	FSCLK	0		8	MHz		49

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part	Material	Colour / plating	Datasheet says	Page
housing	PC		The emulator consists of a base unit that connects to the PC	8

CAD (KiCad official)

Symbol: CY8C24123A-24SXI
Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
3D model: SOIC-8 (KiCad packages3D, STEP)
3D model files: cy8c24123a-24sxi-etched.step / cy8c24123a-24sxi-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cy8c24123a-24sxi.step / cy8c24123a-24sxi.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Cypress Semicon datasheet (71 pp, sha256 96046f32dbd7d49d, retrieved 2026-11-02, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

CY8C24123A-24SXI

Verified CY8C24123A-24SXI

Verification log 1 record

3D Model

Symbol & Footprint

Schematic Symbol

PCB Footprint

Datasheet

README