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CY8C21223-24SXI
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Cypress Semicon CYPRESS, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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CY8C21223-24SXI
Cypress Semicon · CYPRESS · SOIC-16
CY8C21223-24SXI from Cypress Semicon, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | P0[7] | bidirectional | Digital I/O port 0 bit 7 with analog column mux input. |
| 2 | P0[5] | bidirectional | Digital I/O port 0 bit 5 with analog column mux input. |
| 3 | P0[3] | bidirectional | Digital I/O port 0 bit 3 with analog column mux input. |
| 4 | P0[1] | bidirectional | Digital I/O port 0 bit 1 with analog column mux input. |
| 5 | SMP | passive | Switch mode pump connection to required external components. |
| 6 | VSS | power_in | Ground connection. |
| 7 | P1[1] | bidirectional | Digital I/O port 1 bit 1, I2C SCL and ISSP-SCLK (not high Z at POR). |
| 8 | VSS | power_in | Ground connection. |
| 9 | P1[0] | bidirectional | Digital I/O port 1 bit 0, I2C SDA and ISSP-SDATA (not high Z at POR). |
| 10 | P1[2] | bidirectional | Digital I/O port 1 bit 2. |
| 11 | P1[4] | bidirectional | Digital I/O port 1 bit 4, optional external clock input (EXTCLK). |
| 12 | P0[0] | bidirectional | Digital I/O port 0 bit 0 with analog column mux input. |
| 13 | P0[2] | bidirectional | Digital I/O port 0 bit 2 with analog column mux input. |
| 14 | P0[4] | bidirectional | Digital I/O port 0 bit 4 with analog column mux input. |
| 15 | P0[6] | bidirectional | Digital I/O port 0 bit 6 with analog column mux input. |
| 16 | VDD | power_in | Supply voltage. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Cypress Semicon |
| Package | SOIC-16 |
| Category | Embedded Processors & Controllers |
| Pins | 16 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| housing | PC | base unit that connects to the PC by way of a USB port. The base | 6 |
CAD (KiCad official)
- Symbol:
CY8C21223-24SXI - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SOIC-16 (KiCad packages3D, STEP)
- 3D model files:
cy8c21223-24sxi-etched.step/cy8c21223-24sxi-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cy8c21223-24sxi.step/cy8c21223-24sxi.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Cypress Semicon datasheet (47 pp, sha256
91c06fc2ab9310f1, retrieved 2026-10-23, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# CY8C21223-24SXI
**Cypress Semicon** · CYPRESS · SOIC-16
CY8C21223-24SXI from Cypress Semicon, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | P0[7] | bidirectional | Digital I/O port 0 bit 7 with analog column mux input. |
| 2 | P0[5] | bidirectional | Digital I/O port 0 bit 5 with analog column mux input. |
| 3 | P0[3] | bidirectional | Digital I/O port 0 bit 3 with analog column mux input. |
| 4 | P0[1] | bidirectional | Digital I/O port 0 bit 1 with analog column mux input. |
| 5 | SMP | passive | Switch mode pump connection to required external components. |
| 6 | VSS | power_in | Ground connection. |
| 7 | P1[1] | bidirectional | Digital I/O port 1 bit 1, I2C SCL and ISSP-SCLK (not high Z at POR). |
| 8 | VSS | power_in | Ground connection. |
| 9 | P1[0] | bidirectional | Digital I/O port 1 bit 0, I2C SDA and ISSP-SDATA (not high Z at POR). |
| 10 | P1[2] | bidirectional | Digital I/O port 1 bit 2. |
| 11 | P1[4] | bidirectional | Digital I/O port 1 bit 4, optional external clock input (EXTCLK). |
| 12 | P0[0] | bidirectional | Digital I/O port 0 bit 0 with analog column mux input. |
| 13 | P0[2] | bidirectional | Digital I/O port 0 bit 2 with analog column mux input. |
| 14 | P0[4] | bidirectional | Digital I/O port 0 bit 4 with analog column mux input. |
| 15 | P0[6] | bidirectional | Digital I/O port 0 bit 6 with analog column mux input. |
| 16 | VDD | power_in | Supply voltage. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Cypress Semicon |
| Package | SOIC-16 |
| Category | Embedded Processors & Controllers |
| Pins | 16 |
## Materials and finish
As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| housing | PC | | base unit that connects to the PC by way of a USB port. The base | 6 |
## CAD (KiCad official)
- Symbol: `CY8C21223-24SXI`
- Footprint: `Package_SO:SOIC-16_3.9x9.9mm_P1.27mm`
- 3D model: SOIC-16 (KiCad packages3D, STEP)
- 3D model files: `cy8c21223-24sxi-etched.step` / `cy8c21223-24sxi-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cy8c21223-24sxi.step` / `cy8c21223-24sxi.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Cypress Semicon datasheet](https://www.infineon.com/dgdl/Infineon-CY8C21123_CY8C21223_CY8C21323_PSoC_Programmable_System-on-Chip-DataSheet-v30_00-EN.pdf?fileId=8ac78c8c7d0d8da4017d0ec69ee13cf9&utm_source=cypress&utm_medium=referral&utm_campaign=202110_globe_en_all_integration-files) (47 pp, sha256 `91c06fc2ab9310f1`, retrieved 2026-10-23, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/cy8c21223-24sxi-datasheet.pdf)