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CY8C21123-24SXIT

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Infineon Cypress Semicon Microcontrollers (MCU/MPU/SOC), SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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3D Model

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Symbol & Footprint

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Datasheet

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Contents

README

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CY8C21123-24SXIT

Infineon Cypress Semicon · Microcontrollers (MCU/MPU/SOC) · SOIC-8

CY8C21123-24SXIT from Infineon Cypress Semicon, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 P0[5] bidirectional Port 0 bit 5 is a general-purpose I/O pin that also serves as an analog column mux input.
2 P0[3] bidirectional Port 0 bit 3 is a general-purpose I/O pin that also serves as an analog column mux input.
3 P1[1] bidirectional Port 1 bit 1 is a digital I/O pin that doubles as the I2C serial clock (SCL) and the ISSP-SCLK programming clock, and it is not high Z at power-on reset.
4 VSS power_in Ground connection.
5 P1[0] bidirectional Port 1 bit 0 is a digital I/O pin that doubles as the I2C serial data (SDA) and the ISSP-SDATA programming data line, and it is not high Z at power-on reset.
6 P0[2] bidirectional Port 0 bit 2 is a general-purpose I/O pin that also serves as an analog column mux input.
7 P0[4] bidirectional Port 0 bit 4 is a general-purpose I/O pin that also serves as an analog column mux input.
8 VDD power_in Supply voltage, with an operating range of 2.4 V to 5.25 V as stated in the datasheet features.

Key specifications

Parameter Value
Manufacturer Infineon Cypress Semicon
Package SOIC-8
Category Embedded Processors & Controllers
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Storage temperature TSTG -55 100 °C 16
Ambient temperature with power applied TA -40 85 °C 16
Supply voltage on VDD relative to VSS VDD -0.5 6 V 16
Maximum current into any port pin IMIO -25 50 mA 16
Electro static discharge voltage ESD 2000 V Human body model ESD 16
Latch-up current LU 200 mA 16
Ambient temperature TA -40 85 °C 17
Junction temperature TJ -40 100 °C 17
Supply voltage VDD 2.4 5.25 V 17
Supply current, IMO = 24 MHz IDD 3 4 mA VDD = 5.0 V, 25 °C, CPU = 3 MHz, SYSCLK doubler disabled 17
Supply current, IMO = 6 MHz IDD3 1.2 2 mA VDD = 3.3 V, 25 °C, CPU = 3 MHz, clock doubler disabled 17
Supply current, IMO = 6 MHz IDD27 1.1 1.5 mA VDD = 2.55 V, 25 °C, CPU = 3 MHz, clock doubler disabled 17
Sleep (mode) current with POR, LVD, sleep timer, WDT, and internal slow oscillator active, mid temperature range ISB27 2.6 4 µA VDD = 2.55 V, 0 °C to 40 °C 17
Sleep (mode) current with POR, LVD, sleep timer, WDT, and internal slow oscillator active ISB 2.8 5 µA VDD = 3.3 V, -40 °C to 85 °C 17
Reference voltage (bandgap) VREF 1.28 1.3 1.32 V Trimmed for appropriate VDD. VDD = 3.0 V to 5.25 V 17
Reference voltage (bandgap) VREF27 1.16 1.3 1.33 V Trimmed for appropriate VDD. VDD = 2.4 V to 3.0 V 17
Pull-up resistor RPU 4 5.6 8 k 18
Pull-down resistor RPD 4 5.6 8 k 18
High level source current IOH 10 mA VOH = VDD, 1.0 V 18
Low output level VOL 0.75 V IOL = 25 mA, VDD = 4.75 to 5.25 V 18
Low level sink current IOL 25 mA VOL = 0.75 V 18
Input low level VIL 0.8 V VDD = 3.0 to 5.25 18
Input high level VIH 2.1 V VDD = 3.0 to 5.25 18
Capacitive load on pins as input CIN 3.5 10 pF Package and pin dependent. Temp = 25 °C 18
Capacitive load on pins as output COUT 3.5 10 pF Package and pin dependent. Temp = 25 °C 18
High level source current (2.7 V table) IOH 2.5 mA VOH = VDD, 0.4 V 18
Low level sink current (2.7 V table) IOL 10 mA VOL = 0.75 V 18
Low output level (2.7 V table) VOL 0.75 V IOL = 10 mA, VDD = 2.4 to 3.0 V 18
Input low level (2.7 V table) VIL 0.75 V VDD = 2.4 to 3.0 18
Input high level (2.7 V table) VIH 2 V VDD = 2.4 to 3.0 18
VDD for programming and erase VDDP 4.5 5 5.5 V 22
Supply voltage for flash write operations VDDIWRITE 2.7 5.25 V 22
Supply current during programming or verify IDDP 5 25 mA 22
Input low voltage during programming or verify VILP 0.8 V 22
Input high voltage during programming or verify VIHP 2.2 V 22
Flash endurance (per block) FlashENPB 50000 Erase/write cycles per block Guaranteed within one voltage range (note 16) 22
Flash data retention FlashDR 10 Years 22
IMO frequency for 24 MHz FIMO24 22.8 24 25.2 MHz Trimmed for 5 V or 3.3 V operation using factory trim values. SLIMO mode = 0 23
IMO frequency for 6 MHz FIMO6 5.5 6 6.5 MHz Trimmed for 3.3 V operation using factory trim values. SLIMO mode = 1 23
CPU frequency (5 V nominal) FCPU1 0.0937 24 24.6 MHz 23
CPU frequency (3.3 V nominal) FCPU2 0.0937 12 12.3 MHz SLIMO Mode = 0 23
Digital PSoC block frequency (5 V nominal) FBLK5 0 48 49.2 MHz 23
Digital PSoC block frequency (3.3 V nominal) FBLK33 0 24 24.6 MHz 23
ILO frequency F32K1 15 32 64 kHz 23
ILO untrimmed frequency F32K_U 5 100 kHz 23
24 MHz duty cycle DC24M 40 50 60 % 23
ILO duty cycle DCILO 20 50 80 % 23
48 MHz output frequency Fout48M 46.8 48 49.2 MHz Trimmed. Using factory trim values 23
Maximum frequency of signal on row input or row output FMAX 12.3 MHz 23
Power supply slew rate SRPOWER_UP 250 V/ms VDD slew rate during power-up 23
Time from end of POR to CPU executing code tPOWERUP 16 100 ms Power-up from 0 V 23
24-MHz IMO cycle-to-cycle jitter (RMS) tjit_IMO 200 700 ps 23
24-MHz IMO long term N cycle-to-cycle jitter (RMS) tjit_IMO 300 900 ps N = 32 23
24-MHz IMO period jitter (RMS) tjit_IMO 100 400 ps 23
IMO frequency for 12 MHz (2.7 V) FIMO12 11.5 120 12.7 MHz Trimmed for 2.7 V operation using factory trim values. SLIMO mode = 1 24
CPU frequency (2.7 V nominal) FCPU1 0.093 3 3.15 MHz 24
Digital PSoC block frequency (2.7 V nominal) FBLK27 0 12 12.5 MHz 24
ILO frequency (2.7 V) F32K1 8 32 96 kHz 24
Thermal impedance, typical junction-to-ambient, 8-pin SOIC JA 186 °C/W 35

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
housing PC base unit that connects to the PC by way of a USB port. The base 6

CAD (KiCad official)

  • Symbol: CY8C21123-24SXIT
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: cy8c21123-24sxit-etched.step / cy8c21123-24sxit-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cy8c21123-24sxit.step / cy8c21123-24sxit.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Infineon Cypress Semicon datasheet (47 pp, sha256 18c1a0c8d3875abd, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF