CY7C68014A-56PVXC

{
  "slug": "cy7c68014a-56pvxc",
  "version": "0.1.0",
  "type": "component",
  "description": "Cypress Semicon Microcontroller Units (MCUs/MPUs/SOCs), SSOP-56. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "single chip microcomputer-microcontroller",
    "cy7c68014a-56pvxc",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "cy7c68014a-56pvxc.kicad_sym",
    "cy7c68014a-56pvxc.kicad_mod",
    "cy7c68014a-56pvxc.glb",
    "cy7c68014a-56pvxc.step",
    "cy7c68014a-56pvxc.lbr",
    "docs/hero.png",
    "docs/cy7c68014a-56pvxc-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "cy7c68014a-56pvxc-hero.glb",
    "cy7c68014a-56pvxc-hero.overlay.json",
    "cy7c68014a-56pvxc-etched.glb"
  ],
  "component": {
    "mpn": "CY7C68014A-56PVXC",
    "manufacturer": "Cypress Semicon",
    "package": "SSOP-56",
    "pin_count": 56,
    "category": "Single Chip Microcomputer/Microcontroller",
    "subcategory": "Microcontroller Units (MCUs/MPUs/SOCs)",
    "datasheet": "https://www.infineon.com/dgdl/Infineon-CY7C68013A_CY7C68014A_CY7C68015A_CY7C68016A_EZ-USB_FX2LP_USB_Microcontroller_High-Speed_USB_Peripheral_Controller-DataSheet-v31_00-EN.pdf?fileId=8ac78c8c7d0d8da4017d0ec9f7974252&utm_source=cypress&utm_medium=referral&utm_campaign=202110_globe_en_all_integration-files&redirId=File_1_3_1556",
    "parts": {
      "symbol": "cy7c68014a-56pvxc.kicad_sym",
      "footprint": "cy7c68014a-56pvxc.kicad_mod",
      "model_3d": "cy7c68014a-56pvxc-hero.glb",
      "model_3d_plain": "cy7c68014a-56pvxc-etched.glb",
      "model_3d_step": "cy7c68014a-56pvxc-etched.step",
      "model_3d_step_plain": "cy7c68014a-56pvxc.step",
      "lbr": "cy7c68014a-56pvxc.lbr"
    },
    "distributor_links": {
      "lcsc": "C2948520",
      "digikey": "448-CY7C68014A-56PVXC-ND",
      "mouser": "727-CY768014A-56PVXC"
    },
    "distributor_check": {
      "checked_at": "2026-11-02T17:01:22Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "448-CY7C68014A-56PVXC-ND",
        "status": "found"
      },
      "mouser": {
        "pn": "727-CY768014A-56PVXC",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "PD5/FD13",
        "type": "bidirectional",
        "description": "Port D bit 5 is a bidirectional I/O pin that is multiplexed with FIFO/GPIF data bus bit FD[13], selected by IFCONFIG[1..0] and EPxFIFOCFG.0 (wordwide)."
      },
      {
        "number": "2",
        "name": "PD6/FD14",
        "type": "bidirectional",
        "description": "Port D bit 6 is a bidirectional I/O pin that is multiplexed with FIFO/GPIF data bus bit FD[14], selected by IFCONFIG[1..0] and EPxFIFOCFG.0 (wordwide)."
      },
      {
        "number": "3",
        "name": "PD7/FD15",
        "type": "bidirectional",
        "description": "Port D bit 7 is a bidirectional I/O pin that is multiplexed with FIFO/GPIF data bus bit FD[15], selected by IFCONFIG[1..0] and EPxFIFOCFG.0 (wordwide)."
      },
      {
        "number": "4",
        "name": "GND",
        "type": "power_in",
        "description": "Ground."
      },
      {
        "number": "5",
        "name": "CLKOUT",
        "type": "tri_state",
        "description": "CLKOUT is a 12-, 24- or 48-MHz clock phase-locked to the 24-MHz input clock, defaulting to 12 MHz, and may be three-stated by setting CPUCS.1 = 1."
      },
      {
        "number": "6",
        "name": "VCC",
        "type": "power_in",
        "description": "Connect to the 3.3-V power source."
      },
      {
        "number": "7",
        "name": "GND",
        "type": "power_in",
        "description": "Ground."
      },
      {
        "number": "8",
        "name": "RDY0/SLRD",
        "type": "input",
        "description": "RDY0 is a GPIF input signal, and SLRD is the input-only read strobe for the slave FIFOs with programmable polarity (FIFOPINPOLAR.3)."
      },
      {
        "number": "9",
        "name": "RDY1/SLWR",
        "type": "input",
        "description": "RDY1 is a GPIF input signal, and SLWR is the input-only write strobe for the slave FIFOs with programmable polarity (FIFOPINPOLAR.2)."
      },
      {
        "number": "10",
        "name": "AVCC",
        "type": "power_in",
        "description": "Analog VCC; connect to the 3.3 V power source to power the analog section of the chip."
      },
      {
        "number": "11",
        "name": "XTALOUT",
        "type": "output",
        "description": "Crystal output; connect to a 24-MHz parallel-resonant fundamental mode crystal and load capacitor to GND, or leave open if XTALIN is driven by an external clock."
      },
      {
        "number": "12",
        "name": "XTALIN",
        "type": "input",
        "description": "Crystal input; connect to a 24-MHz parallel-resonant fundamental mode crystal and load capacitor to GND, or drive with a 3.3-V square wave."
      },
      {
        "number": "13",
        "name": "AGND",
        "type": "power_in",
        "description": "Analog ground; connect to ground with as short a path as possible."
      },
      {
        "number": "14",
        "name": "AVCC",
        "type": "power_in",
        "description": "Analog VCC; connect to the 3.3 V power source to power the analog section of the chip."
      },
      {
        "number": "15",
        "name": "DPLUS",
        "type": "bidirectional",
        "description": "USB D+ signal; connect to the USB D+ signal."
      },
      {
        "number": "16",
        "name": "DMINUS",
        "type": "bidirectional",
        "description": "USB D- signal; connect to the USB D- signal."
      },
      {
        "number": "17",
        "name": "AGND",
        "type": "power_in",
        "description": "Analog ground; connect to ground with as short a path as possible."
      },
      {
        "number": "18",
        "name": "VCC",
        "type": "power_in",
        "description": "Connect to the 3.3-V power source."
      },
      {
        "number": "19",
        "name": "GND",
        "type": "power_in",
        "description": "Ground."
      },
      {
        "number": "20",
        "name": "IFCLK",
        "type": "bidirectional",
        "description": "Interface clock for synchronously clocking data into or out of the slave FIFOs, also a timing reference for slave FIFO control signals and GPIF; may be inverted by IFCONFIG.4."
      },
      {
        "number": "21",
        "name": "RESERVED",
        "type": "input",
        "description": "Reserved; connect to ground."
      },
      {
        "number": "22",
        "name": "SCL",
        "type": "bidirectional",
        "description": "Clock for the I2C interface; connect to VCC with a 2.2-k resistor even if no I2C peripheral is attached."
      },
      {
        "number": "23",
        "name": "SDA",
        "type": "bidirectional",
        "description": "Data for the I2C compatible interface; connect to VCC with a 2.2-k resistor even if no I2C compatible peripheral is attached."
      },
      {
        "number": "24",
        "name": "VCC",
        "type": "power_in",
        "description": "Connect to the 3.3-V power source."
      },
      {
        "number": "25",
        "name": "PB0/FD0",
        "type": "bidirectional",
        "description": "Port B bit 0 is a bidirectional I/O pin that is multiplexed with FIFO/GPIF data bus bit FD[0], selected by IFCONFIG[1..0]."
      },
      {
        "number": "26",
        "name": "PB1/FD1",
        "type": "bidirectional",
        "description": "Port B bit 1 is a bidirectional I/O pin that is multiplexed with FIFO/GPIF data bus bit FD[1], selected by IFCONFIG[1..0]."
      },
      {
        "number": "27",
        "name": "PB2/FD2",
        "type": "bidirectional",
        "description": "Port B bit 2 is a bidirectional I/O pin that is multiplexed with FIFO/GPIF data bus bit FD[2], selected by IFCONFIG[1..0]."
      },
      {
        "number": "28",
        "name": "PB3/FD3",
        "type": "bidirectional",
        "description": "Port B bit 3 is a bidirectional I/O pin that is multiplexed with FIFO/GPIF data bus bit FD[3], selected by IFCONFIG[1..0]."
      },
      {
        "number": "29",
        "name": "PB4/FD4",
        "type": "bidirectional",
        "description": "Port B bit 4 is a bidirectional I/O pin that is multiplexed with FIFO/GPIF data bus bit FD[4], selected by IFCONFIG[1..0]."
      },
      {
        "number": "30",
        "name": "PB5/FD5",
        "type": "bidirectional",
        "description": "Port B bit 5 is a bidirectional I/O pin that is multiplexed with FIFO/GPIF data bus bit FD[5], selected by IFCONFIG[1..0]."
      },
      {
        "number": "31",
        "name": "PB6/FD6",
        "type": "bidirectional",
        "description": "Port B bit 6 is a bidirectional I/O pin that is multiplexed with FIFO/GPIF data bus bit FD[6], selected by IFCONFIG[1..0]."
      },
      {
        "number": "32",
        "name": "PB7/FD7",
        "type": "bidirectional",
        "description": "Port B bit 7 is a bidirectional I/O pin that is multiplexed with FIFO/GPIF data bus bit FD[7], selected by IFCONFIG[1..0]."
      },
      {
        "number": "33",
        "name": "GND",
        "type": "power_in",
        "description": "Ground."
      },
      {
        "number": "34",
        "name": "VCC",
        "type": "power_in",
        "description": "Connect to the 3.3-V power source."
      },
      {
        "number": "35",
        "name": "GND",
        "type": "power_in",
        "description": "Ground."
      },
      {
        "number": "36",
        "name": "CTL0/FLAGA",
        "type": "tri_state",
        "description": "CTL0 is a GPIF control output, and FLAGA is a programmable slave-FIFO output status flag; the function is selected by IFCONFIG[1..0]."
      },
      {
        "number": "37",
        "name": "CTL1/FLAGB",
        "type": "tri_state",
        "description": "CTL1 is a GPIF control output, and FLAGB is a programmable slave-FIFO output status flag; the function is selected by IFCONFIG[1..0]."
      },
      {
        "number": "38",
        "name": "CTL2/FLAGC",
        "type": "tri_state",
        "description": "CTL2 is a GPIF control output, and FLAGC is a programmable slave-FIFO output status flag; the function is selected by IFCONFIG[1..0]."
      },
      {
        "number": "39",
        "name": "VCC",
        "type": "power_in",
        "description": "Connect to the 3.3-V power source."
      },
      {
        "number": "40",
        "name": "PA0/INT0#",
        "type": "bidirectional",
        "description": "PA0 is a bidirectional I/O port pin, and INT0# is the active-LOW 8051 INT0 interrupt input, edge-triggered (IT0 = 1) or level-triggered (IT0 = 0), selected by PORTACFG.0."
      },
      {
        "number": "41",
        "name": "PA1/INT1#",
        "type": "bidirectional",
        "description": "PA1 is a bidirectional I/O port pin, and INT1# is the active-LOW 8051 INT1 interrupt input, edge-triggered (IT1 = 1) or level-triggered (IT1 = 0), selected by PORTACFG.1."
      },
      {
        "number": "42",
        "name": "PA2/SLOE",
        "type": "bidirectional",
        "description": "PA2 is a bidirectional I/O port pin, and SLOE is an input-only output enable for the slave FIFOs with programmable polarity (FIFOPINPOLAR.4)."
      },
      {
        "number": "43",
        "name": "PA3/WU2",
        "type": "bidirectional",
        "description": "PA3 is a bidirectional I/O port pin, and WU2 is an alternate USB wakeup source enabled by WU2EN (WAKEUP.1) with polarity set by WU2POL (WAKEUP.4)."
      },
      {
        "number": "44",
        "name": "PA4/FIFOADR0",
        "type": "bidirectional",
        "description": "PA4 is a bidirectional I/O port pin, and FIFOADR0 is an input-only address select for the slave FIFOs connected to FD[7..0] or FD[15..0]."
      },
      {
        "number": "45",
        "name": "PA5/FIFOADR1",
        "type": "bidirectional",
        "description": "PA5 is a bidirectional I/O port pin, and FIFOADR1 is an input-only address select for the slave FIFOs connected to FD[7..0] or FD[15..0]."
      },
      {
        "number": "46",
        "name": "PA6/PKTEND",
        "type": "bidirectional",
        "description": "PA6 is a bidirectional I/O port pin, and PKTEND is an input used to commit FIFO packet data to the endpoint, with polarity programmable via FIFOPINPOLAR.5."
      },
      {
        "number": "47",
        "name": "PA7/FLAGD/SLCS#",
        "type": "bidirectional",
        "description": "PA7 is a bidirectional I/O port pin, FLAGD is a programmable slave-FIFO output status flag, and SLCS# gates all other slave FIFO enable/strobes."
      },
      {
        "number": "48",
        "name": "GND",
        "type": "power_in",
        "description": "Ground."
      },
      {
        "number": "49",
        "name": "RESET#",
        "type": "input",
        "description": "Active LOW reset; resets the entire chip."
      },
      {
        "number": "50",
        "name": "VCC",
        "type": "power_in",
        "description": "Connect to the 3.3-V power source."
      },
      {
        "number": "51",
        "name": "WAKEUP",
        "type": "input",
        "description": "USB wakeup; if the 8051 is in suspend, asserting this pin starts the oscillator and interrupts the 8051 to exit suspend mode, with programmable polarity (WAKEUP.4)."
      },
      {
        "number": "52",
        "name": "PD0/FD8",
        "type": "bidirectional",
        "description": "Port D bit 0 is a bidirectional I/O pin that is multiplexed with FIFO/GPIF data bus bit FD[8], selected by IFCONFIG[1..0] and EPxFIFOCFG.0 (wordwide)."
      },
      {
        "number": "53",
        "name": "PD1/FD9",
        "type": "bidirectional",
        "description": "Port D bit 1 is a bidirectional I/O pin that is multiplexed with FIFO/GPIF data bus bit FD[9], selected by IFCONFIG[1..0] and EPxFIFOCFG.0 (wordwide)."
      },
      {
        "number": "54",
        "name": "PD2/FD10",
        "type": "bidirectional",
        "description": "Port D bit 2 is a bidirectional I/O pin that is multiplexed with FIFO/GPIF data bus bit FD[10], selected by IFCONFIG[1..0] and EPxFIFOCFG.0 (wordwide)."
      },
      {
        "number": "55",
        "name": "PD3/FD11",
        "type": "bidirectional",
        "description": "Port D bit 3 is a bidirectional I/O pin that is multiplexed with FIFO/GPIF data bus bit FD[11], selected by IFCONFIG[1..0] and EPxFIFOCFG.0 (wordwide)."
      },
      {
        "number": "56",
        "name": "PD4/FD12",
        "type": "bidirectional",
        "description": "Port D bit 4 is a bidirectional I/O pin that is multiplexed with FIFO/GPIF data bus bit FD[12], selected by IFCONFIG[1..0] and EPxFIFOCFG.0 (wordwide)."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [],
        "pages_sent": 30,
        "cost_usd": 0.0748,
        "at": "2026-11-02T17:00:54"
      },
      "datasheet": {
        "url": "https://www.infineon.com/dgdl/Infineon-CY7C68013A_CY7C68014A_CY7C68015A_CY7C68016A_EZ-USB_FX2LP_USB_Microcontroller_High-Speed_USB_Peripheral_Controller-DataSheet-v31_00-EN.pdf?fileId=8ac78c8c7d0d8da4017d0ec9f7974252&utm_source=cypress&utm_medium=referral&utm_campaign=202110_globe_en_all_integration-files&redirId=File_1_3_1556",
        "pages": 75,
        "sha256": "67d39521d4c85939",
        "source_tier": "mfr"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 56,
        "described": 56,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "cy7c68014a-56pvxc.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          10.35,
          18.5,
          2.99
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "496b138c9bddb6111fccc97928b5e654846ac39b68862745293b24c720d158e5",
        "checked": "2026-11-02",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "cy7c68014a-56pvxc-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          10.35,
          18.5,
          2.99
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "a473cbfac0b0ec33a31a246a98c276bdd39055e2c7edd2f9e5e25af6d14979ab",
        "checked": "2026-11-02",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}