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CY7C65642-48AXCT

Cypress Semicon · Pre-ordered Products · LQFP-48

CY7C65642-48AXCT from Cypress Semicon, in a LQFP-48. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VCC_A power_in 3.3 V analog power to the chip.
2 GND power_in Ground; connect to ground with as short a path as possible.
3 D- bidirectional Upstream D- signal.
4 D+ bidirectional Upstream D+ signal.
5 DD-[1] bidirectional Downstream port 1 D- signal.
6 DD+[1] bidirectional Downstream port 1 D+ signal.
7 VCC_A power_in 3.3 V analog power to the chip.
8 GND power_in Ground; connect to ground with as short a path as possible.
9 DD-[2] bidirectional Downstream port 2 D- signal.
10 DD+[2] bidirectional Downstream port 2 D+ signal.
11 RREF passive A 649 Ω resistor must be connected between RREF and ground.
12 VCC_A power_in 3.3 V analog power to the chip.
13 GND power_in Ground; connect to ground with as short a path as possible.
14 XIN input 12-MHz crystal clock input, or 12/27/48 MHz clock input.
15 XOUT output 12-MHz crystal output; NC if an external clock is used.
16 VCC_A power_in 3.3 V analog power to the chip.
17 DD-[3] bidirectional Downstream port 3 D- signal.
18 DD+[3] bidirectional Downstream port 3 D+ signal.
19 VCC_A power_in 3.3 V analog power to the chip.
20 GND power_in Ground; connect to ground with as short a path as possible.
21 DD-[4] bidirectional Downstream port 4 D- signal.
22 DD+[4] bidirectional Downstream port 4 D+ signal.
23 GREEN[4]/FIXED_PORT4 output Green LED driver output for port 4; at POR, strapping high sets port 4 as non-removable.
24 AMBER[4]/SET_PORT_NUM1 output Amber LED driver output for port 4; SET_PORT_NUM1 sets port numbering together with SET_PORT_NUM2.
25 SEL48 input Clock source selection input (with SEL27): 01 = 48-MHz OSC-in, 10 = 27-MHz OSC-in, 11 = 12-MHz crystal or OSC-in, 00 reserved.
26 RESET# input Active-low external reset input, default pulled high with 10 kΩ; low resets the whole chip to the initial state.
27 TEST/I2C_SCL bidirectional Test input (0 = normal operation, 1 = test mode) and I2C clock to access an I2C EEPROM.
28 OVR#[4] input Active-low overcurrent condition detection input for port 4 (internal pull-up).
29 PWR#[4] tri_state Power switch driver output for port 4, default active low.
30 OVR#[3] input Active-low overcurrent condition detection input for port 3 (internal pull-up).
31 PWR#[3] tri_state Power switch driver output for port 3, default active low.
32 GREEN[3]/FIXED_PORT3 output Green LED driver output for port 3; at POR, strapping high sets port 3 as non-removable.
33 AMBER[3]/SET_PORT_NUM2 output Amber LED driver output for port 3; SET_PORT_NUM2 sets port numbering together with SET_PORT_NUM1.
34 VCC_D power_in 3.3 V digital power to the chip.
35 GREEN[2]/SPI_MISO/FIXED_PORT2 output Green LED driver output for port 2; SPI_MISO data in from SPI EEPROM; at POR, strapping high sets port 2 as non-removable (avoid).
36 AMBER[2]/SPI_MOSI/PWR_PIN_POL output Amber LED driver output for port 2; SPI_MOSI data out to SPI EEPROM; PWR_PIN_POL sets power switch enable polarity (1 = active high, 0 = active low).
37 SELFPWR input Self-power select input: 0 = bus powered, 1 = self powered.
38 VCC_D power_in 3.3 V digital power to the chip.
39 GANG bidirectional Input after POR selecting gang (1) or individual (0) power switching mode, then outputs the suspend flag.
40 OVR#[2] input Active-low overcurrent condition detection input for port 2 (internal pull-up).
41 PWR#[2] tri_state Power switch driver output for port 2, default active low.
42 OVR#[1] input Active-low overcurrent condition detection input for port 1 (internal pull-up).
43 PWR#[1]/I2C_SDA bidirectional Power switch driver output for port 1 (default active low) or I2C data pin to an I2C EEPROM.
44 SEL27 input Clock source selection input (with SEL48): 01 = 48-MHz OSC-in, 10 = 27-MHz OSC-in, 11 = 12-MHz crystal or OSC-in, 00 reserved.
45 GREEN[1]/SPI_SK/FIXED_PORT1 output Green LED driver output for port 1; SPI_SK clock to SPI EEPROM; at POR, strapping high sets port 1 as non-removable (avoid).
46 AMBER[1]/SPI_CS output Amber LED driver output for port 1; SPI_CS chip select to SPI EEPROM.
47 VCC power_in 5 V input to the internal regulator; NC if using an external regulator.
48 VREG power_out 5 V to 3.3 V regulator output during internal regulation (connect externally to VCC_A and VCC_D); NC if using an external regulator.

Key specifications

Parameter Value
Manufacturer Cypress Semicon
Package LQFP-48
Category Electronic Tools/Instruments/Consumables
Pins 48

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input high voltage VIH 2 V 27
Input low voltage VIL 0.8 V 27
Input leakage current (FS/LS) Il -10 10 µA Full speed / low speed (0 < VIN < VCC) 27
Input leakage current (HS) Il -5 0 5 µA High speed mode (0 < VIN < VCC) 27
Output voltage high VOH 2.4 V IOH = 8 mA 27
Output low voltage VOL 0.4 V IOL = 8 mA 27
Pad internal pull-down resistor RDN 29 59 135 kΩ 27
Pad internal pull-up resistor RUP 80 108 140 kΩ 27
Input pin capacitance (FS/LS) CIN 20 pF Full speed / low speed mode 27
Input pin capacitance (HS) CIN 4 4.5 5 pF high speed mode 27
Power dissipation PD 432 mW Excluding USB signals 27
Suspend current ISUSP 1.043 1.3 mA Internal regulator max; typ 1.043, external regulator max 0.786 as printed order 27
Supply current, 4 active ports FS host FS devices ICC 103.9 105.4 mA 4 Active ports, Full speed host, full speed devices 28
Supply current, 4 active ports HS host HS devices ICC 88.2 89.3 mA 4 Active ports, High speed host, high speed devices 28
Supply current, no active ports FS host ICC 48.9 50.3 mA No Active ports, Full speed host 28
Supply current, no active ports HS host ICC 49.1 50.6 mA No Active ports, High speed host 28
Storage temperature -60 100 °C 25
Ambient temperature (abs max) 0 70 °C 25
5 V supply voltage to ground potential (abs max) -0.5 6 V 25
3.3 V supply voltage to ground potential (abs max) -0.5 3.6 V 25
Voltage at open drain input pins (abs max) -0.5 5.5 V OVR#1-4, SELFPWR, RESET# 25
3.3 V input voltage for digital I/O (abs max) -0.5 3.6 V 25
Oscillator or crystal frequency FOSC 12 MHz 12 MHz ± 0.05% 25
Ambient temperature (operating) 0 70 °C 26
Ambient max junction temperature 0 125 °C 26
5 V supply voltage to ground potential (operating) 4.75 5.25 V 26
3.3 V supply voltage to ground potential (operating) 3.15 3.6 V 26
Input voltage for USB signal pins 0.5 3.6 V 26
Voltage at open drain input pins (operating) -0.5 5 V 26
Thermal resistance junction to ambient θJA 78.7 °C/W 48-pin TQFP package 30
Thermal resistance junction to case θJC 35.3 °C/W 48-pin TQFP package 30
CS setup time tCSS 3 µs SPI EEPROM interface 29
CS hold time tCSH 3 µs SPI EEPROM interface 29
SK high time tSKH 1 µs SPI EEPROM interface 29
SK low time tSKL 2.2 µs SPI EEPROM interface 29
DI setup time tDIS 1.8 µs SPI EEPROM interface 29
DI hold time tDIH 2.4 µs SPI EEPROM interface 29
Output delay to 1 tPD1 1.8 µs SPI EEPROM interface 29
Output delay to 0 tPD0 1.8 µs SPI EEPROM interface 29

CAD (KiCad official)

  • Symbol: CY7C65642-48AXCT
  • Footprint: Package_QFP:LQFP-48_7x7mm_P0.5mm
  • 3D model: LQFP-48 (KiCad packages3D, STEP)
  • 3D model files: cy7c65642-48axct-etched.step / cy7c65642-48axct-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cy7c65642-48axct.step / cy7c65642-48axct.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Cypress Semicon datasheet (40 pp, sha256 e73715d79d8d5fce, retrieved 2026-10-27, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF