component
CY7C65632-28LTXCT
Public Made by Adomby adom
Infineon Cypress Semicon USB Converters, QFN-28-EP(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
"slug": "cy7c65632-28ltxct",
"version": "0.1.0",
"type": "component",
"description": "Infineon Cypress Semicon USB Converters, QFN-28-EP(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"tags": [
"component",
"interface",
"cy7c65632-28ltxct",
"factory-2.0.0",
"extractor-text"
],
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
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"README.md",
"cy7c65632-28ltxct.kicad_sym",
"cy7c65632-28ltxct.kicad_mod",
"cy7c65632-28ltxct.glb",
"cy7c65632-28ltxct.step",
"cy7c65632-28ltxct.lbr",
"docs/hero.png",
"docs/cy7c65632-28ltxct-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html",
"cy7c65632-28ltxct-hero.glb",
"cy7c65632-28ltxct-hero.overlay.json",
"cy7c65632-28ltxct-etched.glb"
],
"component": {
"mpn": "CY7C65632-28LTXCT",
"manufacturer": "Infineon Cypress Semicon",
"package": "QFN-28-EP(5x5)",
"pin_count": 29,
"category": "Interface",
"subcategory": "USB Converters",
"datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588884646171971584",
"parts": {
"symbol": "cy7c65632-28ltxct.kicad_sym",
"footprint": "cy7c65632-28ltxct.kicad_mod",
"model_3d": "cy7c65632-28ltxct-hero.glb",
"model_3d_plain": "cy7c65632-28ltxct-etched.glb",
"model_3d_step": "cy7c65632-28ltxct-etched.step",
"model_3d_step_plain": "cy7c65632-28ltxct.step",
"lbr": "cy7c65632-28ltxct.lbr"
},
"distributor_links": {
"lcsc": "C466886",
"digikey": "2832-CY7C65632-28LTXCTTR-ND",
"mouser": "727-CY7C6563228LTXCT"
},
"distributor_check": {
"checked_at": "2026-10-18T06:43:38Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": "2832-CY7C65632-28LTXCTTR-ND",
"status": "found",
"lifecycle": "Active"
},
"mouser": {
"pn": "727-CY7C6563228LTXCT",
"status": "found"
}
},
"pins": [
{
"number": "1",
"name": "D-",
"type": "bidirectional",
"description": "Upstream USB D- signal to the host, an I/O/Z pin per the datasheet pin-type key."
},
{
"number": "2",
"name": "D+",
"type": "bidirectional",
"description": "Upstream USB D+ signal to the host, an I/O/Z pin per the datasheet pin-type key."
},
{
"number": "3",
"name": "DD-[1]",
"type": "bidirectional",
"description": "Downstream D- signal for port 1, an I/O/Z pin per the datasheet pin-type key."
},
{
"number": "4",
"name": "DD+[1]",
"type": "bidirectional",
"description": "Downstream D+ signal for port 1, an I/O/Z pin per the datasheet pin-type key."
},
{
"number": "5",
"name": "VCC_A",
"type": "power_in",
"description": "3.3 V analog power to the chip."
},
{
"number": "6",
"name": "DD-[2]",
"type": "bidirectional",
"description": "Downstream D- signal for port 2, an I/O/Z pin per the datasheet pin-type key."
},
{
"number": "7",
"name": "DD+[2]",
"type": "bidirectional",
"description": "Downstream D+ signal for port 2, an I/O/Z pin per the datasheet pin-type key."
},
{
"number": "8",
"name": "RREF",
"type": "bidirectional",
"description": "A 649 ohm resistor must be connected between RREF and ground."
},
{
"number": "9",
"name": "VCC_A",
"type": "power_in",
"description": "3.3 V analog power to the chip."
},
{
"number": "10",
"name": "XIN",
"type": "input",
"description": "12 MHz crystal clock input, or 12 MHz clock input."
},
{
"number": "11",
"name": "XOUT",
"type": "output",
"description": "12 MHz crystal output."
},
{
"number": "12",
"name": "DD-[3]",
"type": "bidirectional",
"description": "Downstream D- signal for port 3 (NC in the CY7C65634 two-port variant, not NC in the CY7C65632)."
},
{
"number": "13",
"name": "DD+[3]",
"type": "bidirectional",
"description": "Downstream D+ signal for port 3 (NC in the CY7C65634 two-port variant, not NC in the CY7C65632)."
},
{
"number": "14",
"name": "VCC_A",
"type": "power_in",
"description": "3.3 V analog power to the chip."
},
{
"number": "15",
"name": "DD-[4]",
"type": "bidirectional",
"description": "Downstream D- signal for port 4 (NC in the CY7C65634 two-port variant, not NC in the CY7C65632)."
},
{
"number": "16",
"name": "DD+[4]",
"type": "bidirectional",
"description": "Downstream D+ signal for port 4 (NC in the CY7C65634 two-port variant, not NC in the CY7C65632)."
},
{
"number": "17",
"name": "RESET#",
"type": "input",
"description": "Active LOW reset input with a default 10 k pull-up; when driven low the whole chip is reset to its initial state."
},
{
"number": "18",
"name": "I2C_SCL",
"type": "bidirectional",
"description": "Test pin (0 = normal operation, 1 = test mode) that doubles as the I2C clock pin with an internal pull-down."
},
{
"number": "19",
"name": "OVR#[4]",
"type": "input",
"description": "Active LOW overcurrent condition detection input for port 4 with internal pull-up; disabled in gang mode."
},
{
"number": "20",
"name": "OVR#[3]",
"type": "input",
"description": "Active LOW overcurrent condition detection input for port 3 with internal pull-up; disabled in gang mode."
},
{
"number": "21",
"name": "VCC_D",
"type": "power_in",
"description": "3.3 V digital power to the chip."
},
{
"number": "22",
"name": "SELFPWR",
"type": "input",
"description": "Self-power select input: 0 is bus powered, 1 is self powered."
},
{
"number": "23",
"name": "GANG",
"type": "bidirectional",
"description": "Gang/individual mode input after power-on reset (1 = gang, 0 = individual), which becomes a suspend-flag output about 50 to 60 ms after reset."
},
{
"number": "24",
"name": "OVR#[2]",
"type": "input",
"description": "Active LOW overcurrent condition detection input for port 2 with internal pull-up; disabled in gang mode."
},
{
"number": "25",
"name": "OVR#[1]",
"type": "input",
"description": "Active LOW overcurrent condition detection input for port 1 with internal pull-up; the only overcurrent input enabled in gang mode."
},
{
"number": "26",
"name": "PWR#[3] / I2C_SDA",
"type": "bidirectional",
"description": "Power switch driver output for port 3, active LOW by default, which can alternatively serve as I2C data when an EEPROM is connected (not both at once)."
},
{
"number": "27",
"name": "VCC",
"type": "power_in",
"description": "5 V input to the internal regulator; left NC when an external regulator is used."
},
{
"number": "28",
"name": "VREG",
"type": "power_in",
"description": "5 to 3.3 V regulator output during internal regulation; 3.3 V input when an external regulator is used."
},
{
"number": "29",
"name": "EP",
"type": "passive",
"description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: Package-level pin 26 is labeled 'PWR#[3]' on the 28-pin QFN pin table (page 14) but the printed pin ; Pin types printed as I/O/Z, I/O, I(RDN)/I/O(RDN), O/Z, or I/O were mapped to KiCad 'bidirectional' b; The exposed ground pad is not a numbered pin in the datasheet; it is labeled 'GND PAD' and is listed",
"exposed pad 29 added from the footprint",
"dropped thermal pad ['EP'] absent from footprint",
"1/29 pin names appear NOWHERE in the datasheet text: ['10:XIN@p14']"
],
"pages_sent": 24,
"cost_usd": 0.1364,
"at": "2026-10-18T06:41:05"
},
"datasheet": {
"url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588884646171971584",
"pages": 29,
"sha256": "4b7f55e7cebe356f",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 29,
"described": 29,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
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"footprint": "viewers/footprint.html"
},
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"file": "cy7c65632-28ltxct.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
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5.0,
5.0,
0.92
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"zmin_mm": 0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "e9d6d740f505b03e5aa0ac826330f9e269344b84656d051f50eb07ac162749eb",
"checked": "2026-10-18",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "cy7c65632-28ltxct-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
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5.0,
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],
"zmin_mm": 0.0,
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"footprint_binding": "identity",
"sha256": "c40808d7cff74290bf911f8db53e4e5dafca78b3b9ba25c97802f8d3fae99bfb",
"checked": "2026-10-18",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
}
}