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CY7C65632-28LTXCT

Public Made by Adom

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Infineon Cypress Semicon USB Converters, QFN-28-EP(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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CY7C65632-28LTXCT

Infineon Cypress Semicon · USB Converters · QFN-28-EP(5x5)

CY7C65632-28LTXCT from Infineon Cypress Semicon, in a QFN-28-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 D- bidirectional Upstream USB D- signal to the host, an I/O/Z pin per the datasheet pin-type key.
2 D+ bidirectional Upstream USB D+ signal to the host, an I/O/Z pin per the datasheet pin-type key.
3 DD-[1] bidirectional Downstream D- signal for port 1, an I/O/Z pin per the datasheet pin-type key.
4 DD+[1] bidirectional Downstream D+ signal for port 1, an I/O/Z pin per the datasheet pin-type key.
5 VCC_A power_in 3.3 V analog power to the chip.
6 DD-[2] bidirectional Downstream D- signal for port 2, an I/O/Z pin per the datasheet pin-type key.
7 DD+[2] bidirectional Downstream D+ signal for port 2, an I/O/Z pin per the datasheet pin-type key.
8 RREF bidirectional A 649 ohm resistor must be connected between RREF and ground.
9 VCC_A power_in 3.3 V analog power to the chip.
10 XIN input 12 MHz crystal clock input, or 12 MHz clock input.
11 XOUT output 12 MHz crystal output.
12 DD-[3] bidirectional Downstream D- signal for port 3 (NC in the CY7C65634 two-port variant, not NC in the CY7C65632).
13 DD+[3] bidirectional Downstream D+ signal for port 3 (NC in the CY7C65634 two-port variant, not NC in the CY7C65632).
14 VCC_A power_in 3.3 V analog power to the chip.
15 DD-[4] bidirectional Downstream D- signal for port 4 (NC in the CY7C65634 two-port variant, not NC in the CY7C65632).
16 DD+[4] bidirectional Downstream D+ signal for port 4 (NC in the CY7C65634 two-port variant, not NC in the CY7C65632).
17 RESET# input Active LOW reset input with a default 10 k pull-up; when driven low the whole chip is reset to its initial state.
18 I2C_SCL bidirectional Test pin (0 = normal operation, 1 = test mode) that doubles as the I2C clock pin with an internal pull-down.
19 OVR#[4] input Active LOW overcurrent condition detection input for port 4 with internal pull-up; disabled in gang mode.
20 OVR#[3] input Active LOW overcurrent condition detection input for port 3 with internal pull-up; disabled in gang mode.
21 VCC_D power_in 3.3 V digital power to the chip.
22 SELFPWR input Self-power select input: 0 is bus powered, 1 is self powered.
23 GANG bidirectional Gang/individual mode input after power-on reset (1 = gang, 0 = individual), which becomes a suspend-flag output about 50 to 60 ms after reset.
24 OVR#[2] input Active LOW overcurrent condition detection input for port 2 with internal pull-up; disabled in gang mode.
25 OVR#[1] input Active LOW overcurrent condition detection input for port 1 with internal pull-up; the only overcurrent input enabled in gang mode.
26 PWR#[3] / I2C_SDA bidirectional Power switch driver output for port 3, active LOW by default, which can alternatively serve as I2C data when an EEPROM is connected (not both at once).
27 VCC power_in 5 V input to the internal regulator; left NC when an external regulator is used.
28 VREG power_in 5 to 3.3 V regulator output during internal regulation; 3.3 V input when an external regulator is used.
29 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Infineon Cypress Semicon
Package QFN-28-EP(5x5)
Category Interface
Pins 29

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Power dissipation PD 366.5 426.5 mW Excluding USB signals 19
Input high voltage VIH 2 V 19
Input low voltage VIL 0.8 V 19
Input leakage current Il -10 10 µA Full speed / Low speed (0 < VIN < VCC) 19
Input leakage current Il -5 0 5 µA High speed mode (0 < VIN < VCC) 19
Output voltage high VOH 2.4 V IOH = 8 mA 19
Output low voltage VOL 0.4 V IOL= 8 mA 19
Pad internal pull-down Resistor RDN 29 59 135 K 19
Pad internal pull-up Resistor RUP 80 108 140 K 19
Input pin capacitance CIN 20 pF Full speed / Low speed mode 19
Input pin capacitance CIN 4 4.5 5 pF High speed mode 19
Suspend current ISUSP 0.786 1.043 mA External regulator 19
Suspend current ISUSP 0.786 1.3 mA Internal regulator 19
Supply current ICC 88.7 103.9 mA 4 Active ports / Full speed host, full speed devices / External regulator 20
Supply current ICC 88.7 105.4 mA 4 Active ports / Full speed host, full speed devices / Internal regulator 20
Supply current ICC 81.9 88.2 mA 4 Active ports / High speed host, high speed devices / External regulator 20
Supply current ICC 81.9 89.3 mA 4 Active ports / High speed host, high speed devices / Internal regulator 20
Supply current ICC 88.2 101.2 mA 4 Active ports / High speed host, full speed devices / External regulator 20
Supply current ICC 88.2 102.3 mA 4 Active ports / High speed host, full speed devices / Internal regulator 20
Supply current ICC 79.1 91.6 mA 3 Active ports / Full speed host, full speed devices / External regulator 20
Supply current ICC 79.1 93 mA 3 Active ports / Full speed host, full speed devices / Internal regulator 20
Supply current ICC 72.9 78.5 mA 3 Active ports / High speed host, high speed devices / External regulator 20
Supply current ICC 72.9 78.6 mA 3 Active ports / High speed host, high speed devices / Internal regulator 20
Supply current ICC 75.9 88.7 mA 3 Active ports / High speed host, full speed devices / External regulator 20
Supply current ICC 75.9 88.8 mA 3 Active ports / High speed host, full speed devices / Internal regulator 20
Supply current ICC 68.1 78.4 mA 2 Active ports / Full speed host, full speed devices / External regulator 20
Supply current ICC 68.1 78.6 mA 2 Active ports / Full speed host, full speed devices / Internal regulator 20
Supply current ICC 61.9 67.6 mA 2 Active ports / High speed host, high speed devices / External regulator 20
Supply current ICC 61.9 69.6 mA 2 Active ports / High speed host, high speed devices / Internal regulator 20
Supply current ICC 64.9 75.4 mA 2 Active ports / High speed host, full speed devices / External regulator 20
Supply current ICC 64.9 76.1 mA 2 Active ports / High speed host, full speed devices / Internal regulator 20
Supply current ICC 57.1 66.3 mA 1 Active port / Full speed host, full speed devices / External regulator 20
Supply current ICC 57.1 66.7 mA 1 Active port / Full speed host, full speed devices / Internal regulator 20
Supply current ICC 51.9 57.6 mA 1 Active port / High speed host, high speed devices / External regulator 20
Supply current ICC 51.9 59.3 mA 1 Active port / High speed host, high speed devices / Internal regulator 20
Supply current ICC 54.7 61.1 mA 1 Active port / High speed host, full speed devices / External regulator 20
Supply current ICC 54.7 62.5 mA 1 Active port / High speed host, full speed devices / Internal regulator 20
Supply current ICC 42.8 48.9 mA No active ports / Full speed host / External regulator 20
Supply current ICC 42.8 50.3 mA No active ports / Full speed host / Internal regulator 20
Supply current ICC 44.2 49.1 mA No active ports / High speed host / External regulator 20
Supply current ICC 44.2 50.6 mA No active ports / High speed host / Internal regulator 20
Ambient temperature 0 70 °C 19
Ambient max junction temperature 0 125 °C 19
Input voltage for USB signal pins -0.5 3.6 V 19
Voltage at open drain input pins -0.5 5 V 19
Storage temperature -55 100 °C 19
5 V supply voltage to ground potential -0.5 6 V 19
3.3 V supply voltage to ground potential -0.5 3.6 V 19
Voltage at open drain input pins (OVR#1-4, SELFPWR, RESET#) -0.5 5.5 V 19
3.3 V input voltage for digital I/O -0.5 3.6 V 19
Thermal resistance junction to ambient, 28-pin QFN JA 33.3 °C/W 28-pin QFN package 21
Thermal resistance junction to case, 28-pin QFN JC 18.4 °C/W 28-pin QFN package 21

CAD (KiCad official)

  • Symbol: CY7C65632-28LTXCT
  • Footprint: Package_DFN_QFN:QFN-28-1EP_5x5mm_P0.5mm_EP3.35x3.35mm
  • 3D model: QFN-28-EP(5x5) (KiCad packages3D, STEP)
  • 3D model files: cy7c65632-28ltxct-etched.step / cy7c65632-28ltxct-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cy7c65632-28ltxct.step / cy7c65632-28ltxct.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Infineon Cypress Semicon datasheet (29 pp, sha256 4b7f55e7cebe356f, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF