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CY7C64215-28PVXCT

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Cypress Semicon Microcontroller Units (MCUs/MPUs/SOCs), SSOP-28. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentsingle chip microcomputer-microcontrollercy7c64215-28pvxctfactory-2.0.0extractor-text

Verified CY7C64215-28PVXCT

by Ray · last 8 Nov 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

8 Nov 2026RayPublished by the parts factory: tier lcsc, 28 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: CY7C64215-28PVXCT · SSOP-28 · 28 pins
  • ✓copper: 28 copper pads, none touching another net
  • ✓datasheet: all 28 pin names found in the 46-page datasheet
  • ✓distributor: lcsc C2952825, digikey 448-CY7C64215-28PVXCTTR-ND, mouser 727-CY7C6421528PVXCT
  • ✓family: SSOP-28_5.3x10.2mm_P0.65mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-qlnunixe/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 28 pins = 28 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 28 pins agree
  • ✓symbol_text: no pin names collide
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ cy7c64215-28pvxct.kicad_sym✓ cy7c64215-28pvxct.kicad_mod✓ cy7c64215-28pvxct.step
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CY7C64215-28PVXCT

Cypress Semicon · Microcontroller Units (MCUs/MPUs/SOCs) · SSOP-28

CY7C64215-28PVXCT from Cypress Semicon, in a SSOP-28. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VSS power_in Ground connection.
2 P0[7] bidirectional Digital I/O port pin that is an analog column mux input.
3 P0[5] bidirectional Digital I/O port pin that is an analog column mux input and column output.
4 P0[3] bidirectional Digital I/O port pin that is an analog column mux input and column output.
5 P0[1] bidirectional Digital I/O port pin that is an analog column mux input.
6 P2[5] bidirectional Digital I/O port pin that is an analog mux input.
7 P2[3] bidirectional Digital I/O port pin that is a direct switched capacitor block input.
8 P2[1] bidirectional Digital I/O port pin that is a direct switched capacitor block input.
9 P1[7] bidirectional Digital I/O port pin that is also the I2C SCL.
10 P1[5] bidirectional Digital I/O port pin that is also the I2C SDA.
11 P1[3] bidirectional Digital I/O port pin that is an analog mux input.
12 P1[1] bidirectional Digital I/O port pin that is also I2C SCL and ISSP-SCLK.
13 VSS power_in Ground connection.
14 D+ bidirectional USB D+ data line.
15 D- bidirectional USB D- data line.
16 VDD power_in Supply voltage.
17 P1[0] bidirectional Digital I/O port pin that is also I2C data/clock line and ISSP-SDATA (the table lists I2C SCL, the figure lists I2C SDA).
18 P1[2] bidirectional Digital I/O port pin that is an analog mux input.
19 P1[4] bidirectional Digital I/O port pin that is an analog mux input.
20 P1[6] bidirectional Digital I/O port pin that is an analog mux input.
21 P2[0] bidirectional Digital I/O port pin that is a direct switched capacitor block input.
22 P2[2] bidirectional Digital I/O port pin that is a direct switched capacitor block input.
23 P2[4] bidirectional Digital I/O port pin that is the external analog ground (AGND) input.
24 P0[0] bidirectional Digital I/O port pin that is an analog column mux input.
25 P0[2] bidirectional Digital I/O port pin that is an analog column mux input and column output.
26 P0[4] bidirectional Digital I/O port pin that is an analog column mux input and column output.
27 P0[6] bidirectional Digital I/O port pin that is an analog column mux input.
28 VDD power_in Supply voltage.

Key specifications

Parameter Value
Manufacturer Cypress Semicon
Package SSOP-28
Category Single Chip Microcomputer/Microcontroller
Pins 28

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VDD 3 5.25 V 15
Commercial ambient temperature TAC 0 70 °C 14
Junction temperature TJ -40 100 °C 14
Storage temperature TSTG -55 100 °C 14
Ambient temperature with power applied TA 0 70 °C 14
Supply voltage on VDD relative to VSS VDD -0.5 6 V 14
Maximum current into any port pin IMIO -25 50 mA 14
Maximum current into any port pin configured as analog driver IMAIO -50 50 mA 14
Electrostatic discharge voltage ESD 2000 V Human body model ESD. 14
Latch up current LU 200 mA 14
Supply current, IMO = 24 MHz (5 V) IDD5 14 27 mA VDD = 5.0 V, TA = 25 °C, CPU = 3 MHz, SYSCLK doubler disabled, VC1 = 1.5 MHz, VC2 = 93.75 kHz, VC3 = 93.75 kHz, analog power = off. 15
Supply current, IMO = 24 MHz (3.3 V) IDD3 8 14 mA VDD = 3.3 V, TA = 25 °C, CPU = 3 MHz, SYSCLK doubler disabled, VC1 = 1.5 MHz, VC2 = 93.75 kHz, VC3 = 0.367 kHz, analog power = off. 15
Sleep mode current with POR, LVD, sleep timer, and WDT ISB 3 6.5 µA Conditions are with internal slow speed oscillator, VDD = 3.3 V, 0 °C < TA < 55 °C, analog power = off. 15
Sleep current with POR, LVD, sleep timer, and WDT at high temperature ISBH 4 25 µA Conditions are with internal slow speed oscillator, VDD = 3.3 V, 55 °C < TA < 70 °C, analog power = off. 15
Pull-up resistor RPU 4 5.6 8 kΩ 16
Pull-down resistor RPD 4 5.6 8 kΩ 16
High-level source current IOH 10 mA 16
Low-level sink current IOL 25 mA 16
Low output level VOL 0.75 V IOL = 25 mA, VDD = 4.75 to 5.25 V (8 total loads, 4 on even port pins (for example, P0[2], P1[4]), 4 on odd port pins (for example, P0[3], P1[5])). 150 mA maximum combined IOL budget. 16
Input low level VIL 0.8 V VDD = 3.15 to 5.25. 16
Input high level VIH 2.1 V VDD = 3.15 to 5.25. 16
Capacitive load on pins as input CIN 10 pF Package and pin dependent. Temp = 25 °C. 16
Capacitive load on pins as output COUT 10 pF Package and pin dependent. Temp = 25 °C. 16
Differential input sensitivity VDI 0.2 V / (D+), (D-) / 16
Differential input common mode range VCM 0.8 2.5 V 16
Single-ended receiver threshold VSE 0.8 2 V 16
Transceiver capacitance CIN 20 pF 16
External USB series resistor REXT 23 25 Ω In series with each USB pin. 16
Static output high, driven VUOH 2.8 3.6 V 15 kΩ ± 5% to ground. Internal pull-up enabled. 16
Static output high, idle VUOHI 2.7 3.6 V 15 kΩ ± 5% to ground. Internal pull-up enabled. 16
Static output low VUOL 0.3 V 15 kΩ ± 5% to ground. Internal pull-up enabled. 16
USB driver output impedance ZO 28 44 Ω Including REXT resistor. 16
D+/D- crossover voltage VCRS 1.3 2 V 16
Supply voltage for flash write operation VDDIWRITE 3.15 5.25 V This specification applies to this device when it is executing internal flash writes. 24
Flash endurance (per block) FlashENPB 50000 erase/write cycles Per block; guaranteed only when Flash operates within one voltage range (3.0V to 3.6V or 4.75V to 5.25V). 24
Flash data retention FlashDR 10 years 24
IMO frequency for 24 MHz (5 V) FIMO245V 23.04 24 24.96 MHz Trimmed for 5 V operation using factory trim values. 25
IMO frequency for 24 MHz (3.3 V) FIMO243V 22.08 24 25.92 MHz Trimmed for 3.3 V operation using factory trim values. 25
IMO frequency with USB frequency locking enabled and USB traffic present FIMOUSB 23.94 24 24.06 MHz USB operation for system clock source from the IMO is limited to 0°C < TA < 70°C. 25
CPU frequency (5 V nominal) FCPU1 0.09 24 24.96 MHz SLIMO mode = 0. 25
CPU frequency (3.3 V nominal) FCPU2 0.086 12 12.96 MHz SLIMO mode = 0. 25
Digital PSoC block frequency (5 V nominal) FBLK5 0 48 49.92 MHz 25
Digital PSoC block frequency (3.3 V nominal) FBLK3 0 24 25.92 MHz 25
ILO frequency F32K1 15 32 64 kHz 25
ILO duty cycle DCILO 20 50 80 % 25
24-MHz duty cycle DC24M 40 50 60 % 25
48-MHz output frequency Fout48M 46.08 48 49.92 MHz Trimmed. Using factory trim values. 25
Maximum frequency of signal on row input or row output FMAX 12.96 MHz 25
Time from end of POR to CPU executing code TPOWERUP 16 100 ms 25
GPIO operating frequency FGPIO 0 12 MHz Normal Strong Mode 26
Rise time, normal strong mode TRiseF 3 18 ns Cload = 50 pF, VDD = 4.5 to 5.25 V, 10%-90% 26
Fall time, normal strong mode TFallF 2 18 ns Cload = 50 pF, VDD = 4.5 to 5.25 V, 10%-90% 26
Rise time, slow strong mode TRiseS 10 27 ns Cload = 50 pF, VDD = 3 to 5.25 V, 10%-90% 26
Fall time, slow strong mode TFallS 10 22 ns Cload = 50 pF, VDD = 3 to 5.25 V, 10%-90% 26
Transition rise time TRFS 4 20 ns For 50-pF load. 26
Transition fall time TFSS 4 20 ns For 50-pF load. 26
Rise/fall time matching (TR/TF) TRFMFS 90 111 % For 50-pF load. 26
Thermal impedance, junction to ambient, 28-pin SSOP JA 96 °C/W 33

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
housing PC The emulator consists of a base unit that connects to the PC 7

CAD (KiCad official)

  • Symbol: CY7C64215-28PVXCT
  • Footprint: Package_SO:SSOP-28_5.3x10.2mm_P0.65mm
  • 3D model: SSOP-28 (KiCad packages3D, STEP)
  • 3D model files: cy7c64215-28pvxct-etched.step / cy7c64215-28pvxct-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cy7c64215-28pvxct.step / cy7c64215-28pvxct.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Cypress Semicon datasheet (46 pp, sha256 0b74c71e9480da7a, retrieved 2026-11-08, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF