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CY74FCT821ATSOC
Public Made by Adomby adom
Texas Instruments Flip Flops, SOIC-24. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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CY74FCT821ATSOC
Texas Instruments · Flip Flops · SOIC-24
CY74FCT821ATSOC from Texas Instruments, in a SOIC-24. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OE | input | Output control input: when OE is high the Y outputs are forced to the high-impedance state, and when OE is low the true register data is present at the Y outputs. |
| 2 | D0 | input | D flip-flop data input 0, loaded into the register on the low-to-high transition of CP. |
| 3 | D1 | input | D flip-flop data input 1, loaded into the register on the low-to-high transition of CP. |
| 4 | D2 | input | D flip-flop data input 2, loaded into the register on the low-to-high transition of CP. |
| 5 | D3 | input | D flip-flop data input 3, loaded into the register on the low-to-high transition of CP. |
| 6 | D4 | input | D flip-flop data input 4, loaded into the register on the low-to-high transition of CP. |
| 7 | D5 | input | D flip-flop data input 5, loaded into the register on the low-to-high transition of CP. |
| 8 | D6 | input | D flip-flop data input 6, loaded into the register on the low-to-high transition of CP. |
| 9 | D7 | input | D flip-flop data input 7, loaded into the register on the low-to-high transition of CP. |
| 10 | D8 | input | D flip-flop data input 8, loaded into the register on the low-to-high transition of CP. |
| 11 | D9 | input | D flip-flop data input 9, loaded into the register on the low-to-high transition of CP. |
| 12 | GND | power_in | Ground reference pin for the device. |
| 13 | CP | input | Clock pulse input for the register; data enters the register on the low-to-high clock transition. |
| 14 | Y9 | tri_state | Register 3-state output 9, high-impedance when OE is high; the output is rated for 64-mA sink and 32-mA source current. |
| 15 | Y8 | tri_state | Register 3-state output 8, high-impedance when OE is high; the output is rated for 64-mA sink and 32-mA source current. |
| 16 | Y7 | tri_state | Register 3-state output 7, high-impedance when OE is high; the output is rated for 64-mA sink and 32-mA source current. |
| 17 | Y6 | tri_state | Register 3-state output 6, high-impedance when OE is high; the output is rated for 64-mA sink and 32-mA source current. |
| 18 | Y5 | tri_state | Register 3-state output 5, high-impedance when OE is high; the output is rated for 64-mA sink and 32-mA source current. |
| 19 | Y4 | tri_state | Register 3-state output 4, high-impedance when OE is high; the output is rated for 64-mA sink and 32-mA source current. |
| 20 | Y3 | tri_state | Register 3-state output 3, high-impedance when OE is high; the output is rated for 64-mA sink and 32-mA source current. |
| 21 | Y2 | tri_state | Register 3-state output 2, high-impedance when OE is high; the output is rated for 64-mA sink and 32-mA source current. |
| 22 | Y1 | tri_state | Register 3-state output 1, high-impedance when OE is high; the output is rated for 64-mA sink and 32-mA source current. |
| 23 | Y0 | tri_state | Register 3-state output 0, high-impedance when OE is high; the output is rated for 64-mA sink and 32-mA source current. |
| 24 | VCC | power_in | Supply voltage pin; recommended VCC is 4.75 V minimum, 5 V nominal, 5.25 V maximum. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-24 |
| Category | Logic |
| Pins | 24 |
CAD (KiCad official)
- Symbol:
CY74FCT821ATSOC - Footprint:
Package_SO:SOIC-24W_7.5x15.4mm_P1.27mm - 3D model: SOIC-24 (KiCad packages3D, STEP)
- 3D model files:
cy74fct821atsoc-etched.step/cy74fct821atsoc-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cy74fct821atsoc.step/cy74fct821atsoc.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (14 pp, sha256
5826866e972c5a41, retrieved 2026-10-11, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# CY74FCT821ATSOC
**Texas Instruments** · Flip Flops · SOIC-24
CY74FCT821ATSOC from Texas Instruments, in a SOIC-24. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OE | input | Output control input: when OE is high the Y outputs are forced to the high-impedance state, and when OE is low the true register data is present at the Y outputs. |
| 2 | D0 | input | D flip-flop data input 0, loaded into the register on the low-to-high transition of CP. |
| 3 | D1 | input | D flip-flop data input 1, loaded into the register on the low-to-high transition of CP. |
| 4 | D2 | input | D flip-flop data input 2, loaded into the register on the low-to-high transition of CP. |
| 5 | D3 | input | D flip-flop data input 3, loaded into the register on the low-to-high transition of CP. |
| 6 | D4 | input | D flip-flop data input 4, loaded into the register on the low-to-high transition of CP. |
| 7 | D5 | input | D flip-flop data input 5, loaded into the register on the low-to-high transition of CP. |
| 8 | D6 | input | D flip-flop data input 6, loaded into the register on the low-to-high transition of CP. |
| 9 | D7 | input | D flip-flop data input 7, loaded into the register on the low-to-high transition of CP. |
| 10 | D8 | input | D flip-flop data input 8, loaded into the register on the low-to-high transition of CP. |
| 11 | D9 | input | D flip-flop data input 9, loaded into the register on the low-to-high transition of CP. |
| 12 | GND | power_in | Ground reference pin for the device. |
| 13 | CP | input | Clock pulse input for the register; data enters the register on the low-to-high clock transition. |
| 14 | Y9 | tri_state | Register 3-state output 9, high-impedance when OE is high; the output is rated for 64-mA sink and 32-mA source current. |
| 15 | Y8 | tri_state | Register 3-state output 8, high-impedance when OE is high; the output is rated for 64-mA sink and 32-mA source current. |
| 16 | Y7 | tri_state | Register 3-state output 7, high-impedance when OE is high; the output is rated for 64-mA sink and 32-mA source current. |
| 17 | Y6 | tri_state | Register 3-state output 6, high-impedance when OE is high; the output is rated for 64-mA sink and 32-mA source current. |
| 18 | Y5 | tri_state | Register 3-state output 5, high-impedance when OE is high; the output is rated for 64-mA sink and 32-mA source current. |
| 19 | Y4 | tri_state | Register 3-state output 4, high-impedance when OE is high; the output is rated for 64-mA sink and 32-mA source current. |
| 20 | Y3 | tri_state | Register 3-state output 3, high-impedance when OE is high; the output is rated for 64-mA sink and 32-mA source current. |
| 21 | Y2 | tri_state | Register 3-state output 2, high-impedance when OE is high; the output is rated for 64-mA sink and 32-mA source current. |
| 22 | Y1 | tri_state | Register 3-state output 1, high-impedance when OE is high; the output is rated for 64-mA sink and 32-mA source current. |
| 23 | Y0 | tri_state | Register 3-state output 0, high-impedance when OE is high; the output is rated for 64-mA sink and 32-mA source current. |
| 24 | VCC | power_in | Supply voltage pin; recommended VCC is 4.75 V minimum, 5 V nominal, 5.25 V maximum. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-24 |
| Category | Logic |
| Pins | 24 |
## CAD (KiCad official)
- Symbol: `CY74FCT821ATSOC`
- Footprint: `Package_SO:SOIC-24W_7.5x15.4mm_P1.27mm`
- 3D model: SOIC-24 (KiCad packages3D, STEP)
- 3D model files: `cy74fct821atsoc-etched.step` / `cy74fct821atsoc-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cy74fct821atsoc.step` / `cy74fct821atsoc.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/cy74fct821t) (14 pp, sha256 `5826866e972c5a41`, retrieved 2026-10-11, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/cy74fct821atsoc-datasheet.pdf)