component

CY74FCT652TQCT

Public Made by Adom

by adom

Texas Instruments Buffers, Drivers, Receivers, Transceivers, SSOP-24-150mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentlogiccy74fct652tqctfactory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 11d ago
viewers cy74fct652tqct: viewers · Ray 11d ago
cy74fct652tqct-etched.glb cy74fct652tqct: factory component page (tier=lcsc) · Ray 11d ago
cy74fct652tqct-etched.step cy74fct652tqct: factory component page (tier=lcsc) · Ray 11d ago
cy74fct652tqct-hero.glb cy74fct652tqct: hero GLB from the etched model (keeps the MPN mark) · Ray 11d ago
cy74fct652tqct-hero.overlay.json Publish 0.1.0 · Ray 11d ago
cy74fct652tqct.glb Publish 0.1.0 · Ray 11d ago
cy74fct652tqct.kicad_mod Publish 0.1.0 · Ray 11d ago
cy74fct652tqct.kicad_sym Publish 0.1.0 · Ray 11d ago
cy74fct652tqct.lbr Publish 0.1.0 · Ray 11d ago
cy74fct652tqct.step Publish 0.1.0 · Ray 11d ago
package.json Publish 0.1.0 · Ray 11d ago
page.json Set visibility: public · Ray 11d ago
README.md Publish 0.1.0 · Ray 11d ago

CY74FCT652TQCT

Texas Instruments · Buffers, Drivers, Receivers, Transceivers · SSOP-24-150mil

CY74FCT652TQCT from Texas Instruments, in a SSOP-24-150mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CPAB input Clock input for the A-to-B register; data on the A or B bus is stored on each low-to-high transition of CPAB, regardless of the select or enable levels.
2 SAB input Select control for the A-to-B data path that chooses real-time data when low and stored data when high.
3 GAB input Transceiver control input for the A-to-B direction that, together with GBA and SAB/SBA, determines whether the A and B outputs are enabled (function table, page 2).
4 A1 bidirectional Bus A data line, 3-state I/O that is disabled (high impedance) when not enabled by the GAB/GBA controls and is disabled by the Ioff circuitry when the device is powered down.
5 A2 bidirectional Bus A data line, 3-state I/O that is disabled (high impedance) when not enabled by the GAB/GBA controls and is disabled by the Ioff circuitry when the device is powered down.
6 A3 bidirectional Bus A data line, 3-state I/O that is disabled (high impedance) when not enabled by the GAB/GBA controls and is disabled by the Ioff circuitry when the device is powered down.
7 A4 bidirectional Bus A data line, 3-state I/O that is disabled (high impedance) when not enabled by the GAB/GBA controls and is disabled by the Ioff circuitry when the device is powered down.
8 A5 bidirectional Bus A data line, 3-state I/O that is disabled (high impedance) when not enabled by the GAB/GBA controls and is disabled by the Ioff circuitry when the device is powered down.
9 A6 bidirectional Bus A data line, 3-state I/O that is disabled (high impedance) when not enabled by the GAB/GBA controls and is disabled by the Ioff circuitry when the device is powered down.
10 A7 bidirectional Bus A data line, 3-state I/O that is disabled (high impedance) when not enabled by the GAB/GBA controls and is disabled by the Ioff circuitry when the device is powered down.
11 A8 bidirectional Bus A data line, 3-state I/O that is disabled (high impedance) when not enabled by the GAB/GBA controls and is disabled by the Ioff circuitry when the device is powered down.
12 GND power_in Ground reference for the device.
13 B8 bidirectional Bus B data line, 3-state I/O that is disabled (high impedance) when not enabled by the GBA/GAB controls and is disabled by the Ioff circuitry when the device is powered down.
14 B7 bidirectional Bus B data line, 3-state I/O that is disabled (high impedance) when not enabled by the GBA/GAB controls and is disabled by the Ioff circuitry when the device is powered down.
15 B6 bidirectional Bus B data line, 3-state I/O that is disabled (high impedance) when not enabled by the GBA/GAB controls and is disabled by the Ioff circuitry when the device is powered down.
16 B5 bidirectional Bus B data line, 3-state I/O that is disabled (high impedance) when not enabled by the GBA/GAB controls and is disabled by the Ioff circuitry when the device is powered down.
17 B4 bidirectional Bus B data line, 3-state I/O that is disabled (high impedance) when not enabled by the GBA/GAB controls and is disabled by the Ioff circuitry when the device is powered down.
18 B3 bidirectional Bus B data line, 3-state I/O that is disabled (high impedance) when not enabled by the GBA/GAB controls and is disabled by the Ioff circuitry when the device is powered down.
19 B2 bidirectional Bus B data line, 3-state I/O that is disabled (high impedance) when not enabled by the GBA/GAB controls and is disabled by the Ioff circuitry when the device is powered down.
20 B1 bidirectional Bus B data line, 3-state I/O that is disabled (high impedance) when not enabled by the GBA/GAB controls and is disabled by the Ioff circuitry when the device is powered down.
21 GBA input Transceiver control input for the B-to-A direction that, together with GAB and SAB/SBA, determines whether the A and B outputs are enabled (function table, page 2).
22 SBA input Select control for the B-to-A data path that chooses real-time data when low and stored data when high.
23 CPBA input Clock input for the B-to-A register; data on the A or B bus is stored on each low-to-high transition of CPBA, regardless of the select or enable levels.
24 VCC power_in Supply voltage, specified at 4.75 V minimum, 5 V nominal and 5.25 V maximum.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SSOP-24-150mil
Category Logic
Pins 24

CAD (KiCad official)

  • Symbol: CY74FCT652TQCT
  • Footprint: Package_SO:SSOP-24_5.3x8.2mm_P0.65mm
  • 3D model: SSOP-24-150mil (KiCad packages3D, STEP)
  • 3D model files: cy74fct652tqct-etched.step / cy74fct652tqct-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cy74fct652tqct.step / cy74fct652tqct.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (16 pp, sha256 84723999e8b0e828, retrieved 2026-10-11, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF