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CY74FCT646ATSOCT
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Texas Instruments Buffers, Drivers, Receivers, Transceivers, SOIC-24-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownCY74FCT646ATSOCT
Texas Instruments · Buffers, Drivers, Receivers, Transceivers · SOIC-24-300mil
CY74FCT646ATSOCT from Texas Instruments, in a SOIC-24-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CPAB | input | Clock-pulse input for the A-to-B register; data on the bus is stored on each low-to-high transition. |
| 2 | SAB | input | Output data-source-select input that multiplexes stored and real-time data for the A-to-B path. |
| 3 | DIR | input | Direction input that determines which bus receives data when G is low. |
| 4 | A1 | bidirectional | Data register A input and data register B output for bus A, bit 1. |
| 5 | A2 | bidirectional | Data register A input and data register B output for bus A, bit 2. |
| 6 | A3 | bidirectional | Data register A input and data register B output for bus A, bit 3. |
| 7 | A4 | bidirectional | Data register A input and data register B output for bus A, bit 4. |
| 8 | A5 | bidirectional | Data register A input and data register B output for bus A, bit 5. |
| 9 | A6 | bidirectional | Data register A input and data register B output for bus A, bit 6. |
| 10 | A7 | bidirectional | Data register A input and data register B output for bus A, bit 7. |
| 11 | A8 | bidirectional | Data register A input and data register B output for bus A, bit 8. |
| 12 | GND | power_in | Ground reference for the device. |
| 13 | B8 | bidirectional | Data register B input and data register A output for bus B, bit 8. |
| 14 | B7 | bidirectional | Data register B input and data register A output for bus B, bit 7. |
| 15 | B6 | bidirectional | Data register B input and data register A output for bus B, bit 6. |
| 16 | B5 | bidirectional | Data register B input and data register A output for bus B, bit 5. |
| 17 | B4 | bidirectional | Data register B input and data register A output for bus B, bit 4. |
| 18 | B3 | bidirectional | Data register B input and data register A output for bus B, bit 3. |
| 19 | B2 | bidirectional | Data register B input and data register A output for bus B, bit 2. |
| 20 | B1 | bidirectional | Data register B input and data register A output for bus B, bit 1. |
| 21 | G | input | Output-enable input; when high the device is in isolation mode and the data outputs are disabled. |
| 22 | SBA | input | Output data-source-select input that multiplexes stored and real-time data for the B-to-A path. |
| 23 | CPBA | input | Clock-pulse input for the B-to-A register; data on the bus is stored on each low-to-high transition. |
| 24 | VCC | power_in | Supply voltage; 4.75 V to 5.25 V is recommended for the CY74FCT646T. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-24-300mil |
| Category | Logic |
| Pins | 24 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VCC | 4.75 | 5 | 5.25 | V | 5 | |
| High-level input voltage | VIH | 2 | V | 5 | |||
| Low-level input voltage | VIL | 0.8 | V | 5 | |||
| High-level output current | IOH | -32 | mA | 5 | |||
| Low-level output current | IOL | 64 | mA | 5 | |||
| Operating free-air temperature | TA | -40 | 85 | °C | 5 | ||
| Supply voltage range to ground potential | -0.5 | 7 | V | 4 | |||
| DC input voltage range | -0.5 | 7 | V | 4 | |||
| DC output voltage range | -0.5 | 7 | V | 4 | |||
| DC output current (maximum sink current/pin) | 120 | mA | maximum sink current/pin | 4 | |||
| Ambient temperature range with power applied | TA | -65 | 135 | °C | with power applied | 4 | |
| Storage temperature range | Tstg | -65 | 150 | °C | 4 | ||
| Input clamp voltage | VIK | -0.7 | -1.2 | V | VCC = 4.75 V, IIN = -18 mA | 6 | |
| High-level output voltage | VOH | 2.4 | 3.3 | V | VCC = 4.75 V, IOH = -15 mA | 6 | |
| High-level output voltage | VOH | 2 | V | VCC = 4.75 V, IOH = -32 mA | 6 | ||
| Low-level output voltage | VOL | 0.3 | 0.55 | V | VCC = 4.75 V, IOL = 64 mA | 6 | |
| Input hysteresis | Vhys | 0.2 | V | All inputs | 6 | ||
| Input current | II | 5 | µA | VCC = 5.25 V, VIN = VCC | 6 | ||
| High-level input current | IIH | -1 | 1 | µA | VCC = 5.25 V, VIN = 2.7 V | 6 | |
| Low-level input current | IIL | -1 | 1 | µA | VCC = 5.25 V, VIN = 0.5 V | 6 | |
| Off-state output current, high-level voltage applied | IOZH | 10 | µA | VCC = 5.25 V, VOUT = 2.7 V | 6 | ||
| Off-state output current, low-level voltage applied | IOZL | -10 | µA | VCC = 5.25 V, VOUT = 0.5 V | 6 | ||
| Short-circuit output current | IOS | -60 | -120 | -225 | mA | VCC = 5.25 V, VOUT = 0 V | 6 |
| Power-off output current | Ioff | -1 | 1 | µA | VCC = 0 V, VOUT = 4.5 V | 6 | |
| Quiescent supply current | ICC | 0.1 | 0.2 | mA | VCC = 5.25 V, VIN ≤ 0.2 V or VIN ≥ VCC, 0.2 V | 6 | |
| Supply current per TTL high input | ∆ICC | 0.5 | 2 | mA | VCC = 5.25 V, VIN = 3.4 V, f1 = 0, outputs open | 6 | |
| Total supply current, one bit switching at f1 = 5 MHz | IC | 0.7 | 1.4 | mA | VCC = 5.25 V, outputs open, G = DIR = GND, SAB = SBA = GND, one bit switching at f1 = 5 MHz, VIN ≤ 0.2 V or VIN ≥ VCC, 0.2 V | 7 | |
| Total supply current, one bit at 50% duty cycle, f0 = 10 MHz | IC | 1.2 | 3.4 | mA | VCC = 5.25 V, f0 = 10 MHz, outputs open, one bit at 50% duty cycle, VIN = 3.4 V or GND | 7 | |
| Total supply current, eight bits switching at f1 = 5 MHz | IC | 2.8 | 5.6 | mA | VCC = 5.25 V, outputs open, G = DIR = GND, SAB = SBA = GND, eight bits switching at f1 = 5 MHz, VIN ≤ 0.2 V or VIN ≥ VCC, 0.2 V; example of ICC formula | 7 | |
| Total supply current, eight bits at 50% duty cycle | IC | 5.1 | 14.6 | mA | VCC = 5.25 V, outputs open, G = DIR = GND, SAB = SBA = GND, eight bits at 50% duty cycle, VIN = 3.4 V or GND; example of ICC formula | 7 | |
| Input capacitance | Ci | 6 | 10 | pF | 7 | ||
| Output capacitance | Co | 8 | 12 | pF | 7 | ||
| Pulse duration | tw | 5 | ns | see Figure 2 | 8 | ||
| Setup time, data before CPAB↑ or CPBA↑ | tsu | 2 | ns | see Figure 2 | 8 | ||
| Hold time, data after CPAB↑ or CPBA↑ | th | 1.5 | ns | see Figure 2 | 8 | ||
| Propagation delay A or B to B or A | tPLH | 1.5 | 6.3 | ns | see Figure 2 | 8 | |
| Enable time DIR to A or B | tPZH | 1.5 | 9.8 | ns | see Figure 2 | 8 | |
| Disable time G and DIR to A or B | tPHZ | 1.5 | 6.3 | ns | see Figure 2 | 8 | |
| Propagation delay CPAB or CPBA to A or B | tPLH | 1.5 | 6.3 | ns | see Figure 2 | 8 | |
| Propagation delay SBA or SAB to A or B | tPLH | 1.5 | 7.7 | ns | see Figure 2 | 8 | |
| Package thermal impedance, junction to ambient | θJA | 46 | °C/W | SO package, see Note 1 (JESD 51-7) | 4 |
CAD (KiCad official)
- Symbol:
CY74FCT646ATSOCT - Footprint:
Package_SO:SOIC-24W_7.5x15.4mm_P1.27mm - 3D model: SOIC-24-300mil (KiCad packages3D, STEP)
- 3D model files:
cy74fct646atsoct-etched.step/cy74fct646atsoct-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cy74fct646atsoct.step/cy74fct646atsoct.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (15 pp, sha256
13b3f72899297c10, retrieved 2026-11-05, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).