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CY74FCT574TSOC
Public Made by Adomby adom
Texas Instruments Flip Flops, SOIC-20-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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CY74FCT574TSOC
Texas Instruments · Flip Flops · SOIC-20-300mil
CY74FCT574TSOC from Texas Instruments, in a SOIC-20-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OE | input | Active-low output enable: when OE is low the flip-flop contents appear on O0-O7, and when OE is high the outputs go to the high-impedance state without changing the flip-flops. |
| 2 | D0 | input | Data input to flip-flop 0, stored on the low-to-high CP transition with a minimum setup time of 2 ns and hold time of 1.5 ns. |
| 3 | D1 | input | Data input to flip-flop 1, stored on the low-to-high CP transition with a minimum setup time of 2 ns and hold time of 1.5 ns. |
| 4 | D2 | input | Data input to flip-flop 2, stored on the low-to-high CP transition with a minimum setup time of 2 ns and hold time of 1.5 ns. |
| 5 | D3 | input | Data input to flip-flop 3, stored on the low-to-high CP transition with a minimum setup time of 2 ns and hold time of 1.5 ns. |
| 6 | D4 | input | Data input to flip-flop 4, stored on the low-to-high CP transition with a minimum setup time of 2 ns and hold time of 1.5 ns. |
| 7 | D5 | input | Data input to flip-flop 5, stored on the low-to-high CP transition with a minimum setup time of 2 ns and hold time of 1.5 ns. |
| 8 | D6 | input | Data input to flip-flop 6, stored on the low-to-high CP transition with a minimum setup time of 2 ns and hold time of 1.5 ns. |
| 9 | D7 | input | Data input to flip-flop 7, stored on the low-to-high CP transition with a minimum setup time of 2 ns and hold time of 1.5 ns. |
| 10 | GND | power_in | Ground reference for the device. |
| 11 | CP | input | Buffered common clock; the flip-flops capture their D inputs on the low-to-high transition, with a clock pulse duration of 7 ns high or low for the CY74FCT574T. |
| 12 | O7 | tri_state | Three-state output of flip-flop 7, active when OE is low and high-impedance when OE is high; sinks up to 64 mA for the CY74FCT574T. |
| 13 | O6 | tri_state | Three-state output of flip-flop 6, active when OE is low and high-impedance when OE is high; sinks up to 64 mA for the CY74FCT574T. |
| 14 | O5 | tri_state | Three-state output of flip-flop 5, active when OE is low and high-impedance when OE is high; sinks up to 64 mA for the CY74FCT574T. |
| 15 | O4 | tri_state | Three-state output of flip-flop 4, active when OE is low and high-impedance when OE is high; sinks up to 64 mA for the CY74FCT574T. |
| 16 | O3 | tri_state | Three-state output of flip-flop 3, active when OE is low and high-impedance when OE is high; sinks up to 64 mA for the CY74FCT574T. |
| 17 | O2 | tri_state | Three-state output of flip-flop 2, active when OE is low and high-impedance when OE is high; sinks up to 64 mA for the CY74FCT574T. |
| 18 | O1 | tri_state | Three-state output of flip-flop 1, active when OE is low and high-impedance when OE is high; sinks up to 64 mA for the CY74FCT574T. |
| 19 | O0 | tri_state | Three-state output of flip-flop 0, active when OE is low and high-impedance when OE is high; sinks up to 64 mA for the CY74FCT574T. |
| 20 | VCC | power_in | Supply voltage, 4.75 V to 5.25 V (5 V nominal) for the CY74FCT574T. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-20-300mil |
| Category | Logic |
| Pins | 20 |
CAD (KiCad official)
- Symbol:
CY74FCT574TSOC - Footprint:
Package_SO:SOIC-20W_7.5x12.8mm_P1.27mm - 3D model: SOIC-20-300mil (KiCad packages3D, STEP)
- 3D model files:
cy74fct574tsoc-etched.step/cy74fct574tsoc-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cy74fct574tsoc.step/cy74fct574tsoc.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (13 pp, sha256
b7efb6c570f508de, retrieved 2026-10-08, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# CY74FCT574TSOC
**Texas Instruments** · Flip Flops · SOIC-20-300mil
CY74FCT574TSOC from Texas Instruments, in a SOIC-20-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OE | input | Active-low output enable: when OE is low the flip-flop contents appear on O0-O7, and when OE is high the outputs go to the high-impedance state without changing the flip-flops. |
| 2 | D0 | input | Data input to flip-flop 0, stored on the low-to-high CP transition with a minimum setup time of 2 ns and hold time of 1.5 ns. |
| 3 | D1 | input | Data input to flip-flop 1, stored on the low-to-high CP transition with a minimum setup time of 2 ns and hold time of 1.5 ns. |
| 4 | D2 | input | Data input to flip-flop 2, stored on the low-to-high CP transition with a minimum setup time of 2 ns and hold time of 1.5 ns. |
| 5 | D3 | input | Data input to flip-flop 3, stored on the low-to-high CP transition with a minimum setup time of 2 ns and hold time of 1.5 ns. |
| 6 | D4 | input | Data input to flip-flop 4, stored on the low-to-high CP transition with a minimum setup time of 2 ns and hold time of 1.5 ns. |
| 7 | D5 | input | Data input to flip-flop 5, stored on the low-to-high CP transition with a minimum setup time of 2 ns and hold time of 1.5 ns. |
| 8 | D6 | input | Data input to flip-flop 6, stored on the low-to-high CP transition with a minimum setup time of 2 ns and hold time of 1.5 ns. |
| 9 | D7 | input | Data input to flip-flop 7, stored on the low-to-high CP transition with a minimum setup time of 2 ns and hold time of 1.5 ns. |
| 10 | GND | power_in | Ground reference for the device. |
| 11 | CP | input | Buffered common clock; the flip-flops capture their D inputs on the low-to-high transition, with a clock pulse duration of 7 ns high or low for the CY74FCT574T. |
| 12 | O7 | tri_state | Three-state output of flip-flop 7, active when OE is low and high-impedance when OE is high; sinks up to 64 mA for the CY74FCT574T. |
| 13 | O6 | tri_state | Three-state output of flip-flop 6, active when OE is low and high-impedance when OE is high; sinks up to 64 mA for the CY74FCT574T. |
| 14 | O5 | tri_state | Three-state output of flip-flop 5, active when OE is low and high-impedance when OE is high; sinks up to 64 mA for the CY74FCT574T. |
| 15 | O4 | tri_state | Three-state output of flip-flop 4, active when OE is low and high-impedance when OE is high; sinks up to 64 mA for the CY74FCT574T. |
| 16 | O3 | tri_state | Three-state output of flip-flop 3, active when OE is low and high-impedance when OE is high; sinks up to 64 mA for the CY74FCT574T. |
| 17 | O2 | tri_state | Three-state output of flip-flop 2, active when OE is low and high-impedance when OE is high; sinks up to 64 mA for the CY74FCT574T. |
| 18 | O1 | tri_state | Three-state output of flip-flop 1, active when OE is low and high-impedance when OE is high; sinks up to 64 mA for the CY74FCT574T. |
| 19 | O0 | tri_state | Three-state output of flip-flop 0, active when OE is low and high-impedance when OE is high; sinks up to 64 mA for the CY74FCT574T. |
| 20 | VCC | power_in | Supply voltage, 4.75 V to 5.25 V (5 V nominal) for the CY74FCT574T. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-20-300mil |
| Category | Logic |
| Pins | 20 |
## CAD (KiCad official)
- Symbol: `CY74FCT574TSOC`
- Footprint: `Package_SO:SOIC-20W_7.5x12.8mm_P1.27mm`
- 3D model: SOIC-20-300mil (KiCad packages3D, STEP)
- 3D model files: `cy74fct574tsoc-etched.step` / `cy74fct574tsoc-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cy74fct574tsoc.step` / `cy74fct574tsoc.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/cy74fct574t) (13 pp, sha256 `b7efb6c570f508de`, retrieved 2026-10-08, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/cy74fct574tsoc-datasheet.pdf)