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CY74FCT374TSOC

Texas Instruments · Flip Flops · SOIC-20-300mil

CY74FCT374TSOC from Texas Instruments, in a SOIC-20-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OE input Output enable: when OE is low the flip-flop contents appear at the outputs, and when OE is high the outputs are in the high-impedance state without affecting the flip-flops.
2 O0 tri_state Three-state output of flip-flop 0, with recommended IOH of -32 mA and IOL of 64 mA for CY74FCT374T.
3 D0 input Data input to flip-flop 0, which must meet the setup time of 2 ns and hold time of 1.5 ns relative to the low-to-high CP transition.
4 D1 input Data input to flip-flop 1, which must meet the setup time of 2 ns and hold time of 1.5 ns relative to the low-to-high CP transition.
5 O1 tri_state Three-state output of flip-flop 1, with recommended IOH of -32 mA and IOL of 64 mA for CY74FCT374T.
6 O2 tri_state Three-state output of flip-flop 2, with recommended IOH of -32 mA and IOL of 64 mA for CY74FCT374T.
7 D2 input Data input to flip-flop 2, which must meet the setup time of 2 ns and hold time of 1.5 ns relative to the low-to-high CP transition.
8 D3 input Data input to flip-flop 3, which must meet the setup time of 2 ns and hold time of 1.5 ns relative to the low-to-high CP transition.
9 O3 tri_state Three-state output of flip-flop 3, with recommended IOH of -32 mA and IOL of 64 mA for CY74FCT374T.
10 GND power_in Ground reference; all unused inputs must be held at VCC or GND to ensure proper operation.
11 CP input Buffered clock common to all flip-flops, with data stored on the low-to-high transition and a minimum pulse duration of 7 ns high or low for CY74FCT374T.
12 O4 tri_state Three-state output of flip-flop 4, with recommended IOH of -32 mA and IOL of 64 mA for CY74FCT374T.
13 D4 input Data input to flip-flop 4, which must meet the setup time of 2 ns and hold time of 1.5 ns relative to the low-to-high CP transition.
14 D5 input Data input to flip-flop 5, which must meet the setup time of 2 ns and hold time of 1.5 ns relative to the low-to-high CP transition.
15 O5 tri_state Three-state output of flip-flop 5, with recommended IOH of -32 mA and IOL of 64 mA for CY74FCT374T.
16 O6 tri_state Three-state output of flip-flop 6, with recommended IOH of -32 mA and IOL of 64 mA for CY74FCT374T.
17 D6 input Data input to flip-flop 6, which must meet the setup time of 2 ns and hold time of 1.5 ns relative to the low-to-high CP transition.
18 D7 input Data input to flip-flop 7, which must meet the setup time of 2 ns and hold time of 1.5 ns relative to the low-to-high CP transition.
19 O7 tri_state Three-state output of flip-flop 7, with recommended IOH of -32 mA and IOL of 64 mA for CY74FCT374T.
20 VCC power_in Supply voltage of 4.75 V to 5.25 V (recommended, nominal 5 V) for CY74FCT374T.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-20-300mil
Category Logic
Pins 20

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC 4.75 5 5.25 V CY74FCT374T 3
High-level input voltage VIH 2 V CY74FCT374T 3
Low-level input voltage VIL 0.8 V CY74FCT374T 3
High-level output current IOH -32 mA CY74FCT374T 3
Low-level output current IOL 64 mA CY74FCT374T 3
Operating free-air temperature TA -40 85 °C CY74FCT374T 3
Supply voltage range to ground potential -0.5 7 V 3
DC input voltage range -0.5 7 V 3
DC output voltage range -0.5 7 V 3
DC output current (maximum sink current/pin) 120 mA 3
Ambient temperature range with power applied TA -65 135 °C 3
Storage temperature range Tstg -65 150 °C 3
Package thermal impedance, SO package θJA 58 °C/W SO package, see Note 1 (JESD 51-7) 3
High-level output voltage VOH 2.4 3.3 V VCC = 4.75 V, IOH = -15 mA 4
High-level output voltage VOH 2 V VCC = 4.75 V, IOH = -32 mA 4
Low-level output voltage VOL 0.3 0.55 V VCC = 4.75 V, IOL = 64 mA 4
Input clamp voltage VIK -0.7 -1.2 V VCC = 4.75 V, IIN = -18 mA 4
Hysteresis Vhys 0.2 V All inputs 4
Input current II 5 µA VCC = 5.25 V, VIN = VCC 4
High-level input current IIH -1 1 µA VCC = 5.25 V, VIN = 2.7 V 4
Low-level input current IIL -1 1 µA VCC = 5.25 V, VIN = 0.5 V 4
Power-off input/output current Ioff -1 1 µA VCC = 0 V, VOUT = 4.5 V 4
Short-circuit output current IOS -60 -120 -225 mA VCC = 5.25 V, VOUT = 0 V 4
Off-state high-level output current IOZH 10 µA VCC = 5.25 V, VIN = 2.7 V 4
Off-state low-level output current IOZL -10 µA VCC = 5.25 V, VIN = 0.5 V 4
Quiescent power-supply current ICC 0.1 0.2 mA VCC = 5.25 V, VIN ≤ 0.2 V, VIN ≥ VCC - 0.2 V 4
Power-supply current per TTL high input ∆ICC 0.5 2 mA VCC = 5.25 V, VIN = 3.4 V, f1 = 0, outputs open 4
Dynamic power-supply current per MHz ICCD 0.06 0.12 mA/MHz VCC = 5.25 V, outputs open, one bit switching at 50% duty cycle, OE = GND 5
Total supply current, one bit switching IC 0.7 1.4 mA VCC = 5.25 V, one bit switching at f1 = 5 MHz, outputs open, OE = GND 5
Total supply current, f0 clock IC 1.2 3.4 mA VCC = 5.25 V, f0 = 10 MHz, one input at 50% duty cycle, VIN = 3.4 V or GND, outputs open, OE = GND 5
Total supply current, eight bits switching IC 1.6 3.2 mA VCC = 5.25 V, eight bits switching at f1 = 2.5 MHz, VIN ≤ 0.2 V or ≥ VCC - 0.2 V, outputs open, OE = GND 5
Total supply current, eight bits switching IC 3.9 12.2 mA VCC = 5.25 V, eight bits switching at f1 = 2.5 MHz, VIN = 3.4 V or GND, outputs open, OE = GND 5
Input capacitance Ci 5 10 pF 5
Output capacitance Co 9 12 pF 5
Pulse duration, CP high or low tw 7 ns CY74FCT374T, see Figure 1 6
Setup time, data before CP↑ tsu 2 ns CY74FCT374T, see Figure 1 6
Hold time, data after CP↑ th 1.5 ns CY74FCT374T, see Figure 1 6
Propagation delay CP to O tPLH/tPHL 2 10 ns CY74FCT374T, see Figure 1 6
Enable time OE to O tPZH/tPZL 1.5 12.5 ns CY74FCT374T, see Figure 1 6
Disable time OE to O tPHZ/tPLZ 1.5 8 ns CY74FCT374T, see Figure 1 6

CAD (KiCad official)

  • Symbol: CY74FCT374TSOC
  • Footprint: Package_SO:SOIC-20W_7.5x12.8mm_P1.27mm
  • 3D model: SOIC-20-300mil (KiCad packages3D, STEP)
  • 3D model files: cy74fct374tsoc-etched.step / cy74fct374tsoc-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cy74fct374tsoc.step / cy74fct374tsoc.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (14 pp, sha256 3f92e0aafbb5c870, retrieved 2026-11-05, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF