component
CY74FCT245ATQCT
Public Made by Adomby adom
Texas Instruments Buffers, Drivers, Receivers, Transceivers, SSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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CY74FCT245ATQCT
Texas Instruments · Buffers, Drivers, Receivers, Transceivers · SSOP-20
CY74FCT245ATQCT from Texas Instruments, in a SSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | T/R | input | Transmit/receive input sets the data direction: high enables data flow from A ports to B ports, low enables B to A. |
| 2 | A0 | bidirectional | A-port bus I/O bit 0, a 3-state output that is placed in high impedance when OE is high and is protected from backflow when powered down via Ioff. |
| 3 | A1 | bidirectional | A-port bus I/O bit 1, a 3-state output that is placed in high impedance when OE is high and is protected from backflow when powered down via Ioff. |
| 4 | A2 | bidirectional | A-port bus I/O bit 2, a 3-state output that is placed in high impedance when OE is high and is protected from backflow when powered down via Ioff. |
| 5 | A3 | bidirectional | A-port bus I/O bit 3, a 3-state output that is placed in high impedance when OE is high and is protected from backflow when powered down via Ioff. |
| 6 | A4 | bidirectional | A-port bus I/O bit 4, a 3-state output that is placed in high impedance when OE is high and is protected from backflow when powered down via Ioff. |
| 7 | A5 | bidirectional | A-port bus I/O bit 5, a 3-state output that is placed in high impedance when OE is high and is protected from backflow when powered down via Ioff. |
| 8 | A6 | bidirectional | A-port bus I/O bit 6, a 3-state output that is placed in high impedance when OE is high and is protected from backflow when powered down via Ioff. |
| 9 | A7 | bidirectional | A-port bus I/O bit 7, a 3-state output that is placed in high impedance when OE is high and is protected from backflow when powered down via Ioff. |
| 10 | GND | power_in | Ground reference for the device. |
| 11 | B7 | bidirectional | B-port bus I/O bit 7, a 3-state output that is placed in high impedance when OE is high and is protected from backflow when powered down via Ioff. |
| 12 | B6 | bidirectional | B-port bus I/O bit 6, a 3-state output that is placed in high impedance when OE is high and is protected from backflow when powered down via Ioff. |
| 13 | B5 | bidirectional | B-port bus I/O bit 5, a 3-state output that is placed in high impedance when OE is high and is protected from backflow when powered down via Ioff. |
| 14 | B4 | bidirectional | B-port bus I/O bit 4, a 3-state output that is placed in high impedance when OE is high and is protected from backflow when powered down via Ioff. |
| 15 | B3 | bidirectional | B-port bus I/O bit 3, a 3-state output that is placed in high impedance when OE is high and is protected from backflow when powered down via Ioff. |
| 16 | B2 | bidirectional | B-port bus I/O bit 2, a 3-state output that is placed in high impedance when OE is high and is protected from backflow when powered down via Ioff. |
| 17 | B1 | bidirectional | B-port bus I/O bit 1, a 3-state output that is placed in high impedance when OE is high and is protected from backflow when powered down via Ioff. |
| 18 | B0 | bidirectional | B-port bus I/O bit 0, a 3-state output that is placed in high impedance when OE is high and is protected from backflow when powered down via Ioff. |
| 19 | OE | input | Output enable: when high, disables both the A and B ports by putting them in the high-impedance state. |
| 20 | VCC | power_in | Supply voltage; recommended range is 4.75 V to 5.25 V for the CY74FCT245AT, with all unused inputs held at VCC or GND. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SSOP-20 |
| Category | Logic |
| Pins | 20 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage (recommended) | VCC | 4.75 | 5 | 5.25 | V | CY74FCT245AT | 3 |
| High-level input voltage | VIH | 2 | V | 3 | |||
| Low-level input voltage | VIL | 0.8 | V | 3 | |||
| High-level output current | IOH | -32 | mA | CY74 family value as printed | 3 | ||
| Low-level output current | IOL | 64 | mA | CY74 family value as printed | 3 | ||
| Operating free-air temperature | TA | -40 | 85 | °C | CY74FCT245AT | 3 | |
| Supply voltage range to ground potential | -0.5 | 7 | V | 3 | |||
| DC input voltage range | -0.5 | 7 | V | 3 | |||
| DC output voltage range | -0.5 | 7 | V | 3 | |||
| DC output current (maximum sink current/pin) | 120 | mA | 3 | ||||
| Ambient temperature range with power applied | TA | -65 | 135 | °C | 3 | ||
| Storage temperature range | Tstg | -65 | 150 | °C | 3 | ||
| High-level output voltage | VOH | 2 | V | VCC = 4.75 V, IOH = -32 mA | 4 | ||
| High-level output voltage | VOH | 2.4 | 3.3 | V | VCC = 4.75 V, IOH = -15 mA | 4 | |
| Input clamp voltage | VIK | -0.7 | -1.2 | V | VCC = 4.75 V, IIN = -18 mA | 4 | |
| Low-level output voltage | VOL | 0.3 | 0.55 | V | VCC = 4.75 V, IOL = 64 mA | 4 | |
| Input current (max) | II | 5 | µA | VCC = 5.25 V, VIN = VCC | 4 | ||
| High-level input current | IIH | -1 | 1 | µA | VCC = 5.25 V, VIN = 2.7 V | 4 | |
| Low-level input current | IIL | -1 | 1 | µA | VCC = 5.25 V, VIN = 0.5 V | 4 | |
| Off-state output current, high-level voltage applied | IOZH | 10 | µA | VCC = 5.25 V, VOUT = 2.7 V | 4 | ||
| Off-state output current, low-level voltage applied | IOZL | -10 | µA | VCC = 5.25 V, VOUT = 0.5 V | 4 | ||
| Short-circuit output current | IOS | -60 | -120 | -225 | mA | VCC = 5.25 V, VOUT = 0 V | 4 |
| Power-off leakage current | Ioff | -1 | 1 | µA | VCC = 0 V, VOUT = 4.5 V | 4 | |
| Quiescent supply current | ICC | 0.1 | 0.2 | mA | VCC = 5.25 V, VIN ≤ 0.2 V, VIN ≥ VCC, 0.2 V | 4 | |
| Supply current per TTL high input | ΔICC | 0.5 | 2 | mA | VCC = 5.25 V, VIN = 3.4 V, f1 = 0, outputs open | 4 | |
| Dynamic current per MHz per input | ICCD | 0.06 | 0.12 | mA/MHz | VCC = 5.25 V, one input switching 50% duty, outputs open, T/R or OE = GND | 4 | |
| Total supply current, one bit switching at 10 MHz | IC | 0.7 | 1.4 | mA | VCC = 5.25 V, VIN ≤ 0.2 V or ≥ VCC, 0.2 V, outputs open | 5 | |
| Total supply current, one bit switching at 50% duty | IC | 1.2 | 3.4 | mA | VCC = 5.25 V, VIN = 3.4 V or GND, outputs open | 5 | |
| Total supply current, eight bits switching at 2.5 MHz | IC | 1.3 | 2.6 | mA | VCC = 5.25 V, T/R or OE = GND, VIN ≤ 0.2 V or ≥ VCC, 0.2 V, f1 = 2.5 MHz | 5 | |
| Total supply current, eight bits switching at 50% duty | IC | 3.3 | 10.6 | mA | VCC = 5.25 V, T/R or OE = GND, VIN = 3.4 V or GND | 5 | |
| Input capacitance | Ci | 5 | 10 | pF | 5 | ||
| Output capacitance | Co | 9 | 12 | pF | 5 | ||
| Propagation delay A or B to B or A (low-to-high) | tPLH | 1.5 | 4.6 | ns | CY74FCT245AT, A or B to B or A, see Figure 1 | 6 | |
| Propagation delay A or B to B or A (high-to-low) | tPHL | 1.5 | 4.6 | ns | CY74FCT245AT, A or B to B or A, see Figure 1 | 6 | |
| Enable time OE or T/R to A or B (high) | tPZH | 1.5 | 6.2 | ns | CY74FCT245AT, OE or T/R to A or B, see Figure 1 | 6 | |
| Enable time OE or T/R to A or B (low) | tPZL | 1.5 | 6.2 | ns | CY74FCT245AT, OE or T/R to A or B, see Figure 1 | 6 | |
| Disable time OE or T/R to A or B (high) | tPHZ | 1.5 | 5 | ns | CY74FCT245AT, OE or T/R to A or B, see Figure 1 | 6 | |
| Disable time OE or T/R to A or B (low) | tPLZ | 1.5 | 5 | ns | CY74FCT245AT, OE or T/R to A or B, see Figure 1 | 6 | |
| Package thermal impedance, Q package (SSOP) | θJA | 68 | °C/W | Q package, per JESD 51-7 | 3 |
CAD (KiCad official)
- Symbol:
CY74FCT245ATQCT - Footprint:
Package_SO:SSOP-20_3.9x8.7mm_P0.635mm - 3D model: SSOP-20 (KiCad packages3D, STEP)
- 3D model files:
cy74fct245atqct-etched.step/cy74fct245atqct-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cy74fct245atqct.step/cy74fct245atqct.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (21 pp, sha256
bb7c5082a5845ca6, retrieved 2026-10-29, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# CY74FCT245ATQCT
**Texas Instruments** · Buffers, Drivers, Receivers, Transceivers · SSOP-20
CY74FCT245ATQCT from Texas Instruments, in a SSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | T/R | input | Transmit/receive input sets the data direction: high enables data flow from A ports to B ports, low enables B to A. |
| 2 | A0 | bidirectional | A-port bus I/O bit 0, a 3-state output that is placed in high impedance when OE is high and is protected from backflow when powered down via Ioff. |
| 3 | A1 | bidirectional | A-port bus I/O bit 1, a 3-state output that is placed in high impedance when OE is high and is protected from backflow when powered down via Ioff. |
| 4 | A2 | bidirectional | A-port bus I/O bit 2, a 3-state output that is placed in high impedance when OE is high and is protected from backflow when powered down via Ioff. |
| 5 | A3 | bidirectional | A-port bus I/O bit 3, a 3-state output that is placed in high impedance when OE is high and is protected from backflow when powered down via Ioff. |
| 6 | A4 | bidirectional | A-port bus I/O bit 4, a 3-state output that is placed in high impedance when OE is high and is protected from backflow when powered down via Ioff. |
| 7 | A5 | bidirectional | A-port bus I/O bit 5, a 3-state output that is placed in high impedance when OE is high and is protected from backflow when powered down via Ioff. |
| 8 | A6 | bidirectional | A-port bus I/O bit 6, a 3-state output that is placed in high impedance when OE is high and is protected from backflow when powered down via Ioff. |
| 9 | A7 | bidirectional | A-port bus I/O bit 7, a 3-state output that is placed in high impedance when OE is high and is protected from backflow when powered down via Ioff. |
| 10 | GND | power_in | Ground reference for the device. |
| 11 | B7 | bidirectional | B-port bus I/O bit 7, a 3-state output that is placed in high impedance when OE is high and is protected from backflow when powered down via Ioff. |
| 12 | B6 | bidirectional | B-port bus I/O bit 6, a 3-state output that is placed in high impedance when OE is high and is protected from backflow when powered down via Ioff. |
| 13 | B5 | bidirectional | B-port bus I/O bit 5, a 3-state output that is placed in high impedance when OE is high and is protected from backflow when powered down via Ioff. |
| 14 | B4 | bidirectional | B-port bus I/O bit 4, a 3-state output that is placed in high impedance when OE is high and is protected from backflow when powered down via Ioff. |
| 15 | B3 | bidirectional | B-port bus I/O bit 3, a 3-state output that is placed in high impedance when OE is high and is protected from backflow when powered down via Ioff. |
| 16 | B2 | bidirectional | B-port bus I/O bit 2, a 3-state output that is placed in high impedance when OE is high and is protected from backflow when powered down via Ioff. |
| 17 | B1 | bidirectional | B-port bus I/O bit 1, a 3-state output that is placed in high impedance when OE is high and is protected from backflow when powered down via Ioff. |
| 18 | B0 | bidirectional | B-port bus I/O bit 0, a 3-state output that is placed in high impedance when OE is high and is protected from backflow when powered down via Ioff. |
| 19 | OE | input | Output enable: when high, disables both the A and B ports by putting them in the high-impedance state. |
| 20 | VCC | power_in | Supply voltage; recommended range is 4.75 V to 5.25 V for the CY74FCT245AT, with all unused inputs held at VCC or GND. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SSOP-20 |
| Category | Logic |
| Pins | 20 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage (recommended) | VCC | 4.75 | 5 | 5.25 | V | CY74FCT245AT | 3 |
| High-level input voltage | VIH | 2 | | | V | | 3 |
| Low-level input voltage | VIL | | | 0.8 | V | | 3 |
| High-level output current | IOH | | | -32 | mA | CY74 family value as printed | 3 |
| Low-level output current | IOL | | | 64 | mA | CY74 family value as printed | 3 |
| Operating free-air temperature | TA | -40 | | 85 | °C | CY74FCT245AT | 3 |
| Supply voltage range to ground potential | | -0.5 | | 7 | V | | 3 |
| DC input voltage range | | -0.5 | | 7 | V | | 3 |
| DC output voltage range | | -0.5 | | 7 | V | | 3 |
| DC output current (maximum sink current/pin) | | | | 120 | mA | | 3 |
| Ambient temperature range with power applied | TA | -65 | | 135 | °C | | 3 |
| Storage temperature range | Tstg | -65 | | 150 | °C | | 3 |
| High-level output voltage | VOH | 2 | | | V | VCC = 4.75 V, IOH = -32 mA | 4 |
| High-level output voltage | VOH | 2.4 | 3.3 | | V | VCC = 4.75 V, IOH = -15 mA | 4 |
| Input clamp voltage | VIK | | -0.7 | -1.2 | V | VCC = 4.75 V, IIN = -18 mA | 4 |
| Low-level output voltage | VOL | | 0.3 | 0.55 | V | VCC = 4.75 V, IOL = 64 mA | 4 |
| Input current (max) | II | | | 5 | µA | VCC = 5.25 V, VIN = VCC | 4 |
| High-level input current | IIH | -1 | | 1 | µA | VCC = 5.25 V, VIN = 2.7 V | 4 |
| Low-level input current | IIL | -1 | | 1 | µA | VCC = 5.25 V, VIN = 0.5 V | 4 |
| Off-state output current, high-level voltage applied | IOZH | | | 10 | µA | VCC = 5.25 V, VOUT = 2.7 V | 4 |
| Off-state output current, low-level voltage applied | IOZL | -10 | | | µA | VCC = 5.25 V, VOUT = 0.5 V | 4 |
| Short-circuit output current | IOS | -60 | -120 | -225 | mA | VCC = 5.25 V, VOUT = 0 V | 4 |
| Power-off leakage current | Ioff | -1 | | 1 | µA | VCC = 0 V, VOUT = 4.5 V | 4 |
| Quiescent supply current | ICC | | 0.1 | 0.2 | mA | VCC = 5.25 V, VIN ≤ 0.2 V, VIN ≥ VCC, 0.2 V | 4 |
| Supply current per TTL high input | ΔICC | | 0.5 | 2 | mA | VCC = 5.25 V, VIN = 3.4 V, f1 = 0, outputs open | 4 |
| Dynamic current per MHz per input | ICCD | | 0.06 | 0.12 | mA/MHz | VCC = 5.25 V, one input switching 50% duty, outputs open, T/R or OE = GND | 4 |
| Total supply current, one bit switching at 10 MHz | IC | | 0.7 | 1.4 | mA | VCC = 5.25 V, VIN ≤ 0.2 V or ≥ VCC, 0.2 V, outputs open | 5 |
| Total supply current, one bit switching at 50% duty | IC | | 1.2 | 3.4 | mA | VCC = 5.25 V, VIN = 3.4 V or GND, outputs open | 5 |
| Total supply current, eight bits switching at 2.5 MHz | IC | | 1.3 | 2.6 | mA | VCC = 5.25 V, T/R or OE = GND, VIN ≤ 0.2 V or ≥ VCC, 0.2 V, f1 = 2.5 MHz | 5 |
| Total supply current, eight bits switching at 50% duty | IC | | 3.3 | 10.6 | mA | VCC = 5.25 V, T/R or OE = GND, VIN = 3.4 V or GND | 5 |
| Input capacitance | Ci | | 5 | 10 | pF | | 5 |
| Output capacitance | Co | | 9 | 12 | pF | | 5 |
| Propagation delay A or B to B or A (low-to-high) | tPLH | 1.5 | | 4.6 | ns | CY74FCT245AT, A or B to B or A, see Figure 1 | 6 |
| Propagation delay A or B to B or A (high-to-low) | tPHL | 1.5 | | 4.6 | ns | CY74FCT245AT, A or B to B or A, see Figure 1 | 6 |
| Enable time OE or T/R to A or B (high) | tPZH | 1.5 | | 6.2 | ns | CY74FCT245AT, OE or T/R to A or B, see Figure 1 | 6 |
| Enable time OE or T/R to A or B (low) | tPZL | 1.5 | | 6.2 | ns | CY74FCT245AT, OE or T/R to A or B, see Figure 1 | 6 |
| Disable time OE or T/R to A or B (high) | tPHZ | 1.5 | | 5 | ns | CY74FCT245AT, OE or T/R to A or B, see Figure 1 | 6 |
| Disable time OE or T/R to A or B (low) | tPLZ | 1.5 | | 5 | ns | CY74FCT245AT, OE or T/R to A or B, see Figure 1 | 6 |
| Package thermal impedance, Q package (SSOP) | θJA | | 68 | | °C/W | Q package, per JESD 51-7 | 3 |
## CAD (KiCad official)
- Symbol: `CY74FCT245ATQCT`
- Footprint: `Package_SO:SSOP-20_3.9x8.7mm_P0.635mm`
- 3D model: SSOP-20 (KiCad packages3D, STEP)
- 3D model files: `cy74fct245atqct-etched.step` / `cy74fct245atqct-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cy74fct245atqct.step` / `cy74fct245atqct.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/cy74fct245t.pdf) (21 pp, sha256 `bb7c5082a5845ca6`, retrieved 2026-10-29, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/cy74fct245atqct-datasheet.pdf)