component
CY74FCT2245ATPC
Public Made by Adomby adom
Texas Instruments Buffers / Drivers, PDIP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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CY74FCT2245ATPC
Texas Instruments · Buffers / Drivers · PDIP-20
CY74FCT2245ATPC from Texas Instruments, in a PDIP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | T/R | input | Direction control: high enables data flow from A ports to B ports (transmit), and low enables data flow from B ports to A ports (receive). |
| 2 | A0 | bidirectional | A-port bus bit 0; 3-state output with 12-mA output sink current and 15-mA output source current, and 25-Ω on-chip series output resistors, placed in high-impedance when OE is high. |
| 3 | A1 | bidirectional | A-port bus bit 1; 3-state output with 12-mA output sink current and 15-mA output source current, and 25-Ω on-chip series output resistors, placed in high-impedance when OE is high. |
| 4 | A2 | bidirectional | A-port bus bit 2; 3-state output with 12-mA output sink current and 15-mA output source current, and 25-Ω on-chip series output resistors, placed in high-impedance when OE is high. |
| 5 | A3 | bidirectional | A-port bus bit 3; 3-state output with 12-mA output sink current and 15-mA output source current, and 25-Ω on-chip series output resistors, placed in high-impedance when OE is high. |
| 6 | A4 | bidirectional | A-port bus bit 4; 3-state output with 12-mA output sink current and 15-mA output source current, and 25-Ω on-chip series output resistors, placed in high-impedance when OE is high. |
| 7 | A5 | bidirectional | A-port bus bit 5; 3-state output with 12-mA output sink current and 15-mA output source current, and 25-Ω on-chip series output resistors, placed in high-impedance when OE is high. |
| 8 | A6 | bidirectional | A-port bus bit 6; 3-state output with 12-mA output sink current and 15-mA output source current, and 25-Ω on-chip series output resistors, placed in high-impedance when OE is high. |
| 9 | A7 | bidirectional | A-port bus bit 7; 3-state output with 12-mA output sink current and 15-mA output source current, and 25-Ω on-chip series output resistors, placed in high-impedance when OE is high. |
| 10 | GND | power_in | Device ground; all supply and input/output voltage limits are referenced to ground potential. |
| 11 | B7 | bidirectional | B-port bus bit 7; 3-state output with 12-mA output sink current and 15-mA output source current, and 25-Ω on-chip series output resistors, placed in high-impedance when OE is high. |
| 12 | B6 | bidirectional | B-port bus bit 6; 3-state output with 12-mA output sink current and 15-mA output source current, and 25-Ω on-chip series output resistors, placed in high-impedance when OE is high. |
| 13 | B5 | bidirectional | B-port bus bit 5; 3-state output with 12-mA output sink current and 15-mA output source current, and 25-Ω on-chip series output resistors, placed in high-impedance when OE is high. |
| 14 | B4 | bidirectional | B-port bus bit 4; 3-state output with 12-mA output sink current and 15-mA output source current, and 25-Ω on-chip series output resistors, placed in high-impedance when OE is high. |
| 15 | B3 | bidirectional | B-port bus bit 3; 3-state output with 12-mA output sink current and 15-mA output source current, and 25-Ω on-chip series output resistors, placed in high-impedance when OE is high. |
| 16 | B2 | bidirectional | B-port bus bit 2; 3-state output with 12-mA output sink current and 15-mA output source current, and 25-Ω on-chip series output resistors, placed in high-impedance when OE is high. |
| 17 | B1 | bidirectional | B-port bus bit 1; 3-state output with 12-mA output sink current and 15-mA output source current, and 25-Ω on-chip series output resistors, placed in high-impedance when OE is high. |
| 18 | B0 | bidirectional | B-port bus bit 0; 3-state output with 12-mA output sink current and 15-mA output source current, and 25-Ω on-chip series output resistors, placed in high-impedance when OE is high. |
| 19 | OE | input | Output enable: when high, disables both the A and B ports into the high-impedance state. |
| 20 | VCC | power_in | Supply voltage, 4.75 V minimum, 5 V nominal, 5.25 V maximum per the recommended operating conditions. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | PDIP-20 |
| Category | Logic ICs |
| Pins | 20 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VCC | 4.75 | 5 | 5.25 | V | 2 | |
| High-level input voltage | VIH | 2 | V | 2 | |||
| Low-level input voltage | VIL | 0.8 | V | 2 | |||
| High-level output current | IOH | -15 | mA | 2 | |||
| Low-level output current | IOL | 12 | mA | 2 | |||
| Operating free-air temperature | TA | -40 | 85 | °C | 2 | ||
| Supply voltage range to ground potential | -0.5 | 7 | V | 2 | |||
| DC input voltage range | -0.5 | 7 | V | 2 | |||
| DC output voltage range | -0.5 | 7 | V | 2 | |||
| DC output current (maximum sink current/pin) | 120 | mA | 2 | ||||
| Ambient temperature range with power applied | TA | -65 | 135 | °C | 2 | ||
| Storage temperature range | Tstg | -65 | 150 | °C | 2 | ||
| Package thermal impedance, P package | θJA | 69 | °C/W | P package, calculated per JESD 51-7 (see Note 1) | 2 | ||
| Low-level output voltage | VOL | 0.3 | 0.55 | V | VCC = 4.75 V, IOL = 12 mA | 3 | |
| High-level output voltage | VOH | 2.4 | 3.3 | V | VCC = 4.75 V, IOH = -15 mA | 3 | |
| Input clamp voltage | VIK | -0.7 | -1.2 | V | VCC = 4.75 V, IIN = -18 mA | 3 | |
| Output resistance | Rout | 20 | 25 | 40 | Ω | VCC = 4.75 V, IOL = 12 mA | 3 |
| High-level input current | IIH | -1 | 1 | µA | VCC = 5.25 V, VIN = 2.7 V | 3 | |
| Low-level input current | IIL | -1 | 1 | µA | VCC = 5.25 V, VIN = 0.5 V | 3 | |
| Short-circuit output current | IOS | -60 | -120 | -225 | mA | VCC = 5.25 V, VOUT = 0 V | 3 |
| Power-off leakage current | Ioff | -1 | 1 | µA | VCC = 0 V, VOUT = 4.5 V | 3 | |
| Quiescent supply current | ICC | 0.1 | 0.2 | mA | VCC = 5.25 V, VIN ≤ 0.2 V, VIN ≥ VCC, 0.2 V | 3 | |
| Supply current per TTL high input | ΔICC | 0.5 | 2 | mA | VCC = 5.25 V, VIN = 3.4 V, f1 = 0, Outputs open | 3 | |
| Dynamic current per MHz | ICCD | 0.06 | 0.12 | mA/MHz | VCC = 5.25 V, one input switching at 50% duty cycle, outputs open, T/R = OE = GND, VIN ≤ 0.2 V or ≥ VCC, 0.2 V | 3 | |
| Input capacitance | Ci | 5 | 10 | pF | 3 | ||
| Output capacitance | Co | 9 | 12 | pF | 3 | ||
| Propagation delay A or B to B or A | tPLH/tPHL | 1.5 | 4.6 | ns | AT grade (CY74FCT2245AT); from A or B to B or A; see Figure 1 | 4 | |
| Output enable time OE to A or B | tPZH/tPZL | 1.5 | 6.2 | ns | AT grade (CY74FCT2245AT); from OE to A or B; see Figure 1 | 4 | |
| Output disable time OE to A or B | tPHZ/tPLZ | 1.5 | 5 | ns | AT grade (CY74FCT2245AT); from OE to A or B; see Figure 1 | 4 |
CAD (KiCad official)
- Symbol:
CY74FCT2245ATPC - Footprint:
Package_DIP:DIP-20_W7.62mm - 3D model: PDIP-20 (KiCad packages3D, STEP)
- 3D model files:
cy74fct2245atpc-etched.step/cy74fct2245atpc-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cy74fct2245atpc.step/cy74fct2245atpc.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (20 pp, sha256
05d1943fba1cf78f, retrieved 2026-10-30, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).