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CY6N139

OCIC · Optocouplers - Logic Output · DIP-8

CY6N139 from OCIC, in a DIP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 NC unconnected No internal connection.
2 VF+ passive LED anode input; forward voltage 1.30-1.70 V typ-max at IF = 16 mA, average input current rated 20 mA.
3 VF- passive LED cathode input; reverse input voltage rated 5.0 V maximum.
4 NC unconnected No internal connection.
5 GND power_in Ground of the detector side, connected to the output Darlington emitter.
6 VO output Open-collector Darlington output; rated -0.5 to 18 V for CY6N139 with average output current 60 mA maximum.
7 VB power_in Base connection of the Darlington phototransistor, used for the photodiode bias connection; emitter-base reverse voltage 0.5 V maximum.
8 VCC power_in Detector supply voltage, rated -0.5 to 18 V for CY6N139.

Key specifications

Parameter Value
Manufacturer OCIC
Package DIP-8
Category Optocoupler/LED/Digital Tube/Photoelectric Device
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Storage temperature TSTG -40 125 ℃ 2
Operating temperature TOPR -40 100 ℃ 2
Junction temperature TJ -40 125 ℃ 2
Soldering temperature (reflow only) TSOL 260 ℃ 10 s 2
DC average input current IF(avg) 20 mA 2
Peak input current IF(PK) 40 mA 50% duty cycle, 1 ms pulse width 2
Peak transient input current IF(TRANS) 1 A ≤1µs pulse width, 300 pps 2
Reverse input voltage VR 5 V 2
Input power dissipation PD 35 mW 2
Average output current IO(AVG) 60 mA 2
Emitter-base reverse voltage VEBR 0.5 V 2
Supply voltage (CY6N139) VCC -0.5 18 V 2
Output voltage (CY6N139) VO -0.5 18 V 2
Output power dissipation PO 100 mW 2
Guaranteed performance temperature range 0 70 °C Stated as guaranteed performance temperature range in features list 1
Reverse breakdown voltage BVR 5 V IR = 10μA 2
Forward voltage VF 1.3 1.7 V IF = 16mA, TA = 25°C 2
Forward voltage VF 1.75 V IF = 16mA 2
High-level output current (CY6N139) IOH 100 uA IF = 0mA, VO = VCC = 18V 2
Logic low supply current (CY6N139) ICCL 0.4 1.5 mA IF = 16mA, VO = Open, VCC = 18V 2
Logic high supply current ICCH 10 uA IF = 0mA, VO = Open, VCC = 18V 2
Current transfer ratio (CY6N139) CTR 400 2500 % IF = 0.5mA, VO = 0.4V, VCC = 4.5V 3
Current transfer ratio (CY6N139) CTR 500 2600 % IF = 16mA, VO = 0.4V, VCC = 4.5V 3
Logic low output voltage (CY6N139) VOL 0.05 0.4 V IF = 0.5mA, IO = 2.0mA, VCC = 4.5V 3
Logic low output voltage (CY6N139) VOL 0.93 0.4 V IF = 1.6mA, IO = 8.0mA, VCC = 4.5V 3
Logic low output voltage (CY6N139) VOL 0.13 0.4 V IF = 5mA, IO = 15mA, VCC = 4.5V 3
Logic low output voltage (CY6N139) VOL 0.18 0.4 V IF = 12mA, IO = 24mA, VCC = 4.5V 3
High-level common mode rejection /CMH/ 1000 V/μs TA = 25°C, /VCM/ = 10V (Peak), IF = 0mA, RL = 2.2KΩ 3
Low-level common mode rejection /CML/ 1000 V/μs TA = 25°C, /VCM/ = 10V (Peak), IF = 1.6mA, RL = 2.2KΩ (Fig. 12) 3
Output high-level delay time (CY6N139) TPLH 2.1 7 ns TA = 25°C, RL = 270Ω, IF = 12 mA 3
Output high-level delay time (CY6N139) TPLH 10 ns RL = 270Ω, IF = 12 mA 3
Output high-level delay time (CY6N139) TPLH 22 60 ns TA = 25°C, RL = 4.7KΩ, IF = 0.5 mA 3
Output high-level delay time (CY6N139) TPLH 90 ns RL = 4.7KΩ, IF = 0.5 mA 3
Output low-level delay time (CY6N139) TPHL 0.2 1 ns TA = 25°C, RL = 270Ω, IF = 12 mA 3
Output low-level delay time (CY6N139) TPHL 2 ns RL = 270Ω, IF = 12 mA 3
Output low-level delay time (CY6N139) TPHL 5 25 ns TA = 25°C, RL = 4.7KΩ, IF = 0.5 mA 3
Output low-level delay time (CY6N139) TPHL 30 ns RL = 4.7KΩ, IF = 0.5 mA 3
Isolation voltage VISO 5000 VRMS RH < 50%, f = 50HZ, II-O ≤ 10μA, t = 1 min. 4
Isolation capacitance (input-output) CI-O 1 pF f = 1MHz, VI-O = 0VDC 4
Isolation leakage current (input-output) II-O 1 μA RH = 45%, TA = 25°C, t = 5s, VI-O = 3000VDC 4
Diode forward voltage temperature coefficient ΔVF/ΔTA -1.94 mV/°C IF = 16mA 2

CAD (KiCad official)

  • Symbol: CY6N139
  • Footprint: Package_DIP:DIP-8_W7.62mm
  • 3D model: DIP-8 (KiCad packages3D, STEP)
  • 3D model files: cy6n139-etched.step / cy6n139-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cy6n139.step / cy6n139.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: OCIC datasheet (9 pp, sha256 39575c66d86b9c29, retrieved 2026-10-30, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF