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CY62148EV30LL-45ZSXI

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Cypress Semicon Pre-ordered Products, SOIC-32. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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CY62148EV30LL-45ZSXI

Cypress Semicon · Pre-ordered Products · SOIC-32

CY62148EV30LL-45ZSXI from Cypress Semicon, in a SOIC-32. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 A17 input Address input A17, one of address pins A0 through A18 selecting the memory location.
2 A16 input Address input A16, one of address pins A0 through A18 selecting the memory location.
3 A14 input Address input A14, one of address pins A0 through A18 selecting the memory location.
4 A12 input Address input A12, one of address pins A0 through A18 selecting the memory location.
5 A7 input Address input A7, one of address pins A0 through A18 selecting the memory location.
6 A6 input Address input A6, one of address pins A0 through A18 selecting the memory location.
7 A5 input Address input A5, one of address pins A0 through A18 selecting the memory location.
8 A4 input Address input A4, one of address pins A0 through A18 selecting the memory location.
9 A3 input Address input A3, one of address pins A0 through A18 selecting the memory location.
10 A2 input Address input A2, one of address pins A0 through A18 selecting the memory location.
11 A1 input Address input A1, one of address pins A0 through A18 selecting the memory location.
12 A0 input Address input A0, one of address pins A0 through A18 selecting the memory location.
13 I/O0 bidirectional Data input/output 0, high impedance when deselected (CE HIGH), outputs disabled (OE HIGH), or during a write (CE LOW and WE LOW).
14 I/O1 bidirectional Data input/output 1, high impedance when deselected (CE HIGH), outputs disabled (OE HIGH), or during a write (CE LOW and WE LOW).
15 I/O2 bidirectional Data input/output 2, high impedance when deselected (CE HIGH), outputs disabled (OE HIGH), or during a write (CE LOW and WE LOW).
16 VSS power_in Ground supply pin.
17 I/O3 bidirectional Data input/output 3, high impedance when deselected (CE HIGH), outputs disabled (OE HIGH), or during a write (CE LOW and WE LOW).
18 I/O4 bidirectional Data input/output 4, high impedance when deselected (CE HIGH), outputs disabled (OE HIGH), or during a write (CE LOW and WE LOW).
19 I/O5 bidirectional Data input/output 5, high impedance when deselected (CE HIGH), outputs disabled (OE HIGH), or during a write (CE LOW and WE LOW).
20 I/O6 bidirectional Data input/output 6, high impedance when deselected (CE HIGH), outputs disabled (OE HIGH), or during a write (CE LOW and WE LOW).
21 I/O7 bidirectional Data input/output 7, high impedance when deselected (CE HIGH), outputs disabled (OE HIGH), or during a write (CE LOW and WE LOW).
22 CE input Active-low chip enable; HIGH deselects the device into standby, and it must be at CMOS levels (not floating) with no intermediate voltage levels permitted.
23 A10 input Address input A10, one of address pins A0 through A18 selecting the memory location.
24 OE input Active-low output enable; taken LOW with CE LOW and WE HIGH to read, and HIGH places the I/O pins in high impedance.
25 A11 input Address input A11, one of address pins A0 through A18 selecting the memory location.
26 A9 input Address input A9, one of address pins A0 through A18 selecting the memory location.
27 A8 input Address input A8, one of address pins A0 through A18 selecting the memory location.
28 A13 input Address input A13, one of address pins A0 through A18 selecting the memory location.
29 WE input Active-low write enable; taken LOW with CE LOW to write the I/O data into the addressed location.
30 A18 input Address input A18, one of address pins A0 through A18 selecting the memory location.
31 A15 input Address input A15, one of address pins A0 through A18 selecting the memory location.
32 VCC power_in Power supply pin, operating range 2.2 V to 3.6 V.

Key specifications

Parameter Value
Manufacturer Cypress Semicon
Package SOIC-32
Category Electronic Tools/Instruments/Consumables
Pins 32

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Output high voltage VOH 2 V IOH = -0.1 mA 5
Output high voltage VOH 2.4 V IOH = -1.0 mA, VCC > 2.70 V 5
Output low voltage VOL 0.4 V IOL = 0.1 mA 5
Input high voltage VIH 1.8 V VCC = 2.2 V to 2.7 V; max is VCC + 0.3 5
Input high voltage VIH 2.2 V VCC = 2.7 V to 3.6 V; max is VCC + 0.3 5
Input low voltage VIL -0.3 0.6 V VCC = 2.2 V to 2.7 V, VFBGA and TSOP II packages 5
Input low voltage VIL -0.3 0.8 V VCC = 2.7 V to 3.6 V, VFBGA and TSOP II packages 5
Input leakage current IIX -1 1 µA GND < VI < VCC 5
Output leakage current IOZ -1 1 µA GND < VO < VCC, Output disabled 5
VCC operating supply current ICC 15 20 mA f = fmax = 1/tRC, VCC = VCC(max), IOUT = 0 mA, CMOS levels 5
VCC operating supply current ICC 3.5 6 mA f = 1 MHz 5
Automatic CE power down current, CMOS inputs ISB1 2.5 7 µA CE > VCC, 0.2 V, VIN > VCC, 0.2 V, VIN < 0.2 V, f = fmax (Address and Data Only), f = 0 (OE and WE), VCC = 3.60 V 5
Input capacitance CIN 10 pF TA = 25 °C, f = 1 MHz, VCC = VCC(typ) 6
Output capacitance COUT 10 pF TA = 25 °C, f = 1 MHz, VCC = VCC(typ) 6
VCC for data retention VDR 1.5 V 7
Data retention current ICCDR 3 8.8 µA VCC = 1.5 V, CE > VCC, 0.2 V, VIN > VCC, 0.2 V or VIN < 0.2 V, Industrial/Automotive-A 7
Chip deselect to data retention time tCDR 0 ns 7
Operation recovery time tR 45 ns CY62148EV30LL-45 7
Read cycle time tRC 45 ns -45 8
Address to data valid tAA 45 ns -45 8
Data hold from address change tOHA 10 ns -45 8
CE LOW to data valid tACE 45 ns -45 8
OE LOW to data valid tDOE 22 ns -45 8
OE LOW to Low Z tLZOE 5 ns -45 8
OE HIGH to High Z tHZOE 18 ns -45 8
CE LOW to Low Z tLZCE 10 ns -45 8
CE HIGH to High Z tHZCE 18 ns -45 8
CE LOW to power-up tPU 0 ns -45 8
CE HIGH to power-down tPD 45 ns -45 8
Write cycle time tWC 45 ns -45 8
CE LOW to write end tSCE 35 ns -45 8
Address setup to write end tAW 35 ns -45 8
Address hold from write end tHA 0 ns -45 8
Address setup to write start tSA 0 ns -45 8
WE pulse width tPWE 35 ns -45 8
Data setup to write end tSD 25 ns -45 8
Data hold from write end tHD 0 ns -45 8
WE LOW to High Z tHZWE 18 ns -45 8
WE HIGH to Low Z tLZWE 10 ns -45 8
Supply voltage range VCC 2.2 3.6 V Operating Range, Industrial/Automotive-A 5
Ambient temperature TA -40 85 °C Operating Range, Industrial/Automotive-A 5
Storage temperature -65 150 °C 5
Ambient temperature with power applied 55 125 °C printed as 55 °C to +125 °C 5
Supply voltage to ground potential -0.3 V max is VCC(max) + 0.3 V 5
DC voltage applied to outputs in High Z state -0.3 V max is VCC(max) + 0.3 V 5
DC input voltage -0.3 V max is VCC(max) + 0.3 V 5
Output current into outputs (LOW) 20 mA 5
Static discharge voltage 2001 V MIL-STD-883, Method 3015, printed > 2001 V 5
Latch up current 200 mA printed > 200 mA 5
Thermal resistance (junction to ambient) ΘJA 59.1 °C/W 32-pin TSOP II, still air, soldered on a 3 × 4.5 inch, four-layer printed circuit board 6
Thermal resistance (junction to case) ΘJC 12.19 °C/W 32-pin TSOP II, still air, soldered on a 3 × 4.5 inch, four-layer printed circuit board 6

CAD (KiCad official)

  • Symbol: CY62148EV30LL-45ZSXI
  • Footprint: Package_SO:SOIC-32_7.518x20.777mm_P1.27mm
  • 3D model: SOIC-32, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 2.65 mm nominal SOIC height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
  • 3D model files: cy62148ev30ll-45zsxi-etched.step / cy62148ev30ll-45zsxi-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cy62148ev30ll-45zsxi.step / cy62148ev30ll-45zsxi.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Cypress Semicon datasheet (21 pp, sha256 8d7a74d5c489d331, retrieved 2026-10-24, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF