main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 2h ago
viewers cy15b104q-sxi: viewers · Ray 2h ago
cy15b104q-sxi-etched.glb Publish 0.1.0 · Ray 2h ago
cy15b104q-sxi-etched.step cy15b104q-sxi: factory component page (tier=lcsc) · Ray 2h ago
cy15b104q-sxi-hero.glb cy15b104q-sxi: hero GLB from the etched model (keeps the MPN mark) · Ray 2h ago
cy15b104q-sxi-hero.overlay.json Publish 0.1.0 · Ray 2h ago
cy15b104q-sxi.glb Publish 0.1.0 · Ray 2h ago
cy15b104q-sxi.kicad_mod Publish 0.1.0 · Ray 2h ago
cy15b104q-sxi.kicad_sym Publish 0.1.0 · Ray 2h ago
cy15b104q-sxi.lbr Publish 0.1.0 · Ray 2h ago
cy15b104q-sxi.step Publish 0.1.0 · Ray 2h ago
package.json Publish 0.1.0 · Ray 2h ago
page.json Set visibility: public · Ray 2h ago
README.md Publish 0.1.0 · Ray 2h ago

CY15B104Q-SXI

Infineon Cypress Semicon · FRAM · SOIC-8

CY15B104Q-SXI from Infineon Cypress Semicon, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 HOLD input HOLD Pin used to pause a serial memory operation by pulling LOW when SCK is LOW; transitions must occur while SCK is LOW; must be tied to VDD if not used.
2 SCK input Serial Clock input for synchronous operation; inputs latched on rising edge and outputs occur on falling edge; clock frequency 0 to 40 MHz.
3 SI input Serial Input pin for data to device; sampled on rising edge of SCK; must be driven to valid logic level to meet IDD specifications; may be connected to SO for single-pin interface.
4 VSS power_in Ground power supply; must be connected to the system ground.
5 VDD power_in Power supply input to device; operating range 2.0 V to 3.6 V over industrial temperature -40°C to +85°C.
6 WP input Write Protect active LOW input; prevents write operation to Status Register when WPEN bit is set to '1'; must be tied to VDD if not used.
7 SO output Serial Output data pin driven on falling edge of SCK during read operations; remains tristated when HOLD is LOW or during non-read operations.
8 CS input Chip Select active LOW input; activates device when LOW and enters low-power standby with output tristated when HIGH; falling edge must occur before each opcode.

Key specifications

Parameter Value
Manufacturer Infineon Cypress Semicon
Package SOIC-8
Category Memory
Pins 8

CAD (KiCad official)

  • Symbol: CY15B104Q-SXI
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: cy15b104q-sxi-etched.step / cy15b104q-sxi-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cy15b104q-sxi.step / cy15b104q-sxi.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Infineon Cypress Semicon datasheet (22 pp, sha256 b392f55463f1089f, retrieved 2026-10-22, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF