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CW32L083RBT6
Public Made by Adomby adom
CW Microcontrollers (MCU/MPU/SOC), LQFP-64(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownCW32L083RBT6
CW · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)
CW32L083RBT6 from CW, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Vcore | power_out | Internal regulator supply output for internal circuits only; it must be decoupled with a 1 µF capacitor to ground. |
| 2 | PC13 | bidirectional | Standard TC I/O with alternate functions PLL_OUT, RTC_1Hz, UART1_CTS, RTC_OUT, BTIM_ETR, GTIM3_ETR and RTC_TAMP. |
| 3 | PC14 | bidirectional | Standard TC I/O that doubles as the 32.768 kHz oscillator input OSC32_IN; alternate functions include AUTOTRIM_ETR, GTIM4_CH4, UART1_RTS, UART4_TXD, SPI2_MISO, GTIM3_TOGP and GTIM3_CH1. |
| 4 | PC15 | bidirectional | Standard TC I/O that doubles as the 32.768 kHz oscillator output OSC32_OUT; alternate functions include HSE_OUT, GTIM4_CH3, GTIM4_ETR, UART4_RXD, SPI2_MOSI, GTIM3_TOGN and GTIM3_CH2. |
| 5 | PF00 | bidirectional | Standard TC I/O that doubles as the high-speed oscillator input OSC_IN; alternate functions include AUTOTRIM_ETR, GTIM4_CH2, I2C1_SDA, BTIM1_TOGN, SPI2_SCK, GTIM2_TOGP and GTIM3_CH3. |
| 6 | PF01 | bidirectional | Standard TC I/O that doubles as the high-speed oscillator output OSC_OUT; alternate functions include LSE_OUT, GTIM4_CH1, I2C1_SCL, BTIM1_TOGP, SPI2_CS, GTIM2_TOGN and GTIM3_CH4. |
| 7 | NRST | input | Active-low chip reset input with an internal pull-up of 7 to 9 kΩ; VIL max is 0.3VDD, VIH min is 0.7VDD, and the minimum reset pulse width is 20 µs. |
| 8 | PC00 | bidirectional | TTa analog-capable I/O with alternate functions UART4_CTS, GTIM2_CH4, SPI1_CS, LPTIM_CH1, UART5_RXD, ATIM_CH1A and I2C2_SCL, and analog function SEG23. |
| 9 | PC01 | bidirectional | TTa analog-capable I/O with alternate functions UART4_RTS, GTIM2_CH3, SPI1_SCK, LPTIM_OUT, UART5_TXD, ATIM_CH2A and I2C2_SDA, and analog function SEG22. |
| 10 | PC02 | bidirectional | TTa analog-capable I/O with alternate functions UART4_RXD, GTIM2_CH2, SPI1_MISO, LPTIM_CH2, UART1_TXD and ATIM_CH3A, and analog function SEG21. |
| 11 | PC03 | bidirectional | TTa analog-capable I/O with alternate functions UART4_TXD, GTIM2_CH1, SPI1_MOSI, LPTIM_ETR, UART1_RXD and ATIM_BK, and analog function SEG20. |
| 12 | VSSA | power_in | Analog ground for the ADC, reset circuit, RC oscillators and PLL. |
| 13 | VDDA | power_in | Analog supply of 1.65 V to 5.5 V for the ADC, reset circuit, internal RC oscillator and PLL; VDDA must always be greater than or equal to VDD. |
| 14 | PA00 | bidirectional | TTa analog-capable I/O with alternate functions UART3_CTS, UART6_CTS, RTC_TAMP, VC1_OUT, SPI2_MISO, GTIM2_CH1 and GTIM2_ETR, and analog functions ADC_AIN0, VC1_CH0 and LVD_CH1. |
| 15 | PA01 | bidirectional | TTa analog-capable I/O with alternate functions UART3_RTS, UART6_RTS, I2C2_SCL, LVD_OUT, SPI2_MOSI, GTIM2_CH2 and RTC_TAMP, and analog functions ADC_AIN1, VC1_CH1 and SEG19. |
| 16 | PA02 | bidirectional | TTa analog-capable I/O with alternate functions UART3_TXD, UART6_TXD, I2C2_SDA, VC2_OUT, SPI2_SCK, GTIM2_CH3 and AUTOTRIM_ETR, and analog functions ADC_AIN2, VC1_CH2 and SEG18. |
| 17 | PA03 | bidirectional | TTa analog-capable I/O with alternate functions UART3_RXD, UART6_RXD, GTIM2_CH2, PCLK_OUT, SPI2_CS, GTIM2_CH4 and ATIM_CH3A, and analog functions ADC_AIN3, VC1_CH3 and SEG17. |
| 18 | PF04 | bidirectional | Standard TC I/O with alternate functions UART1_TXD, GTIM4_CH2 and UART5_RXD. |
| 19 | PF05 | bidirectional | Standard TC I/O with alternate functions UART1_RXD, BTIM_ETR, UART5_TXD and AUTOTRIM_ETR. |
| 20 | PA04 | bidirectional | TTa analog-capable I/O with alternate functions UART4_TXD, UART2_CTS, I2C2_SCL, HCLK_OUT, SPI1_CS, GTIM2_ETR and ATIM_CH2A, and analog functions ADC_AIN4 and VC1_CH4. |
| 21 | PA05 | bidirectional | TTa analog-capable I/O with alternate functions GTIM2_ETR, UART2_RTS, I2C2_SDA, BTIM2_TOGN, SPI1_SCK, GTIM2_CH1 and ATIM_CH1A, and analog functions ADC_AIN5 and VC1_CH5. |
| 22 | PA06 | bidirectional | TTa analog-capable I/O with alternate functions GTIM3_CH1, UART2_TXD, VC1_OUT, BTIM2_TOGP, SPI1_MISO, GTIM1_CH1 and ATIM_BK, and analog functions ADC_AIN6, VC1_CH6 and SEG16. |
| 23 | PA07 | bidirectional | TTa analog-capable I/O with alternate functions GTIM4_CH1, UART2_RXD, VC2_OUT, BTIM1_TOGN, SPI1_MOSI, GTIM1_CH2 and ATIM_CH1B, and analog functions ADC_AIN7, VC1_CH7 and SEG15. |
| 24 | PC04 | bidirectional | TTa analog-capable I/O with alternate functions UART1_TXD, UART6_RXD, IR_OUT and LSI_OUT, and analog functions ADC_AIN8 and SEG14. |
| 25 | PC05 | bidirectional | TTa analog-capable I/O with alternate functions UART1_RXD, UART6_TXD, MCO_OUT, LPTIM_ETR and LPTIM_OUT, and analog functions ADC_AIN9 and SEG13. |
| 26 | PB00 | bidirectional | TTa analog-capable I/O with alternate functions UART5_RXD, UART1_CTS, I2C2_SCL, BTIM1_TOGP, HSIOSC_OUT, GTIM1_CH3 and ATIM_CH2B, and analog functions ADC_AIN10/ExRef, VC2_CH0, LVD_CH2 and SEG12. |
| 27 | PB01 | bidirectional | TTa analog-capable I/O with alternate functions UART5_TXD, UART1_RTS, I2C2_SDA, GTIM4_TOGP, BTIM3_TOGN, GTIM1_CH4 and ATIM_CH3B, and analog functions ADC_AIN11, VC2_CH1 and SEG11. |
| 28 | PB02 | bidirectional | TTa analog-capable I/O with alternate functions UART2_CTS, UART1_TXD, LPTIM_OUT, GTIM4_TOGN, BTIM3_TOGP, GTIM1_ETR and ATIM_CH1A, and analog functions ADC_AIN12 and VC2_CH2. |
| 29 | PB10 | bidirectional | TTa analog-capable I/O with alternate functions UART2_RTS, UART4_RXD, I2C1_SCL, I2C2_SCL, SPI2_SCK, GTIM2_CH3 and ATIM_CH2A, and analog functions VC2_CH3 and SEG10. |
| 30 | PB11 | bidirectional | TTa analog-capable I/O with alternate functions GTIM4_ETR, UART4_TXD, I2C1_SDA, I2C2_SDA, BTIM_ETR, GTIM2_CH4 and ATIM_CH3A, and analog functions LVD_CH3 and SEG9. |
| 31 | VSS | power_in | Digital ground. |
| 32 | VDD | power_in | Digital supply of 1.65 V to 5.5 V for the I/O ports and internal regulator; all VDD pins must be powered at the same voltage. |
| 33 | PB12 | bidirectional | TTa analog-capable I/O with alternate functions GTIM2_TOGP, GTIM4_CH4, LSE_OUT, SPI2_CS, SPI1_CS, GTIM1_TOGP and ATIM_BK, and analog function SEG8. |
| 34 | PB13 | bidirectional | TTa analog-capable I/O with alternate functions GTIM2_TOGN, GTIM4_CH3, I2C2_SCL, SPI2_SCK, SPI1_SCK, GTIM1_TOGN and ATIM_CH1B, and analog function SEG7. |
| 35 | PB14 | bidirectional | TTa analog-capable I/O with alternate functions GTIM2_CH1, GTIM4_CH2, I2C2_SDA, SPI2_MISO, SPI1_MISO, RTC_OUT and ATIM_CH2B, and analog function SEG6. |
| 36 | PB15 | bidirectional | TTa analog-capable I/O with alternate functions GTIM2_CH2, GTIM4_CH1, BTIM2_TOGN, SPI2_MOSI, SPI1_MOSI, RTC_1Hz and ATIM_CH3B, and analog function SEG5. |
| 37 | PC06 | bidirectional | TTa analog-capable I/O with alternate functions UART4_RXD, UART3_TXD, BTIM2_TOGP, GTIM2_CH4 and ATIM_CH1B, and analog function SEG4. |
| 38 | PC07 | bidirectional | TTa analog-capable I/O with alternate functions UART4_TXD, UART3_RXD, BTIM2_TOGN, GTIM2_CH3 and ATIM_CH2B, and analog function SEG3. |
| 39 | PC08 | bidirectional | TTa analog-capable I/O with alternate functions UART4_CTS, UART6_TXD, GTIM4_ETR, GTIM2_CH2 and ATIM_CH3B, and analog function SEG2. |
| 40 | PC09 | bidirectional | TTa analog-capable I/O with alternate functions UART4_RTS, UART6_RXD, I2C1_SDA, GTIM2_CH1 and ATIM_ETR, and analog function SEG1. |
| 41 | PA08 | bidirectional | TTa analog-capable I/O with alternate functions LPTIM_ETR, UART1_TXD, BTIM2_TOGP, MCO_OUT, LVD_OUT, GTIM3_ETR and ATIM_CH1A, and analog functions VC2_CH4 and SEG0. |
| 42 | PA09 | bidirectional | TTa analog-capable I/O with alternate functions UART3_TXD, UART1_RXD, I2C1_SCL, BTIM1_TOGN, SPI1_CS, GTIM3_CH1 and ATIM_CH2A, and analog functions VC2_CH5 and COM0. |
| 43 | PA10 | bidirectional | TTa analog-capable I/O with alternate functions UART3_RXD, UART1_CTS, I2C1_SDA, BTIM1_TOGP, SPI1_SCK, GTIM3_CH2 and ATIM_CH3A, and analog functions VC2_CH6 and COM1. |
| 44 | PA11 | bidirectional | TTa analog-capable I/O with alternate functions UART3_CTS, UART1_RTS, I2C2_SCL, VC1_OUT, SPI1_MISO and GTIM3_CH3, and analog functions VC2_CH7 and COM2. |
| 45 | PA12 | bidirectional | TTa analog-capable I/O with alternate functions UART3_RTS, BTIM_ETR, I2C2_SDA, VC2_OUT, SPI1_MOSI, GTIM3_CH4 and ATIM_ETR, and analog function COM3. |
| 46 | PA13/SWDIO | bidirectional | TC I/O that is configured as the SWD data pin SWDIO after reset, with the internal pull-up enabled by default; alternate functions include I2C1_SDA, UART1_RXD, UART2_TXD, I2C2_SCL and IR_OUT. |
| 47 | PF06 | bidirectional | Standard TC I/O with alternate functions UART6_CTS, I2C1_SCL, GTIM4_TOGP, UART2_CTS, I2C2_SCL, GTIM3_TOGP and BTIM3_TOGN. |
| 48 | PF07 | bidirectional | Standard TC I/O with alternate functions UART6_RTS, I2C1_SDA, GTIM4_TOGN, UART2_RTS, I2C2_SDA, GTIM3_TOGN and BTIM3_TOGP. |
| 49 | PA14/SWCLK | bidirectional | TC I/O that is configured as the SWD clock SWCLK after reset, with the internal pull-up enabled by default; alternate functions include UART3_TXD, I2C1_SCL, UART1_TXD, UART2_RXD and I2C2_SDA. |
| 50 | PA15 | bidirectional | TTa analog-capable I/O with alternate functions UART3_RXD, GTIM2_CH1, UART1_RXD, UART2_TXD, SPI1_CS, GTIM2_ETR and ATIM_CH1B, and analog function SEG55. |
| 51 | PC10 | bidirectional | TTa analog-capable I/O with alternate functions UART4_TXD, GTIM3_CH1, HCLK_OUT, BTIM1_TOGP, VC1_OUT, LPTIM_CH1 and ATIM_CH2B, and analog functions SEG31 and COM4. |
| 52 | PC11 | bidirectional | TTa analog-capable I/O with alternate functions UART4_RXD, GTIM3_CH2, IR_OUT, BTIM1_TOGN, VC2_OUT, LPTIM_CH2 and ATIM_CH3B, and analog functions SEG30 and COM5. |
| 53 | PC12 | bidirectional | TTa analog-capable I/O with alternate functions UART5_TXD, PCLK_OUT, LVD_OUT, UART6_RXD, PLL_OUT and HSIOSC_OUT, and analog functions SEG29 and COM6. |
| 54 | PD02 | bidirectional | TTa analog-capable I/O with alternate functions UART5_RXD, GTIM4_CH1, BTIM_ETR, UART6_TXD, RTC_1Hz, GTIM3_ETR and ATIM_ETR, and analog functions SEG28 and COM7. |
| 55 | PB03 | bidirectional | TTa analog-capable I/O with alternate functions UART3_RTS, GTIM2_CH2, UART4_CTS, UART2_TXD, SPI1_SCK, GTIM1_ETR and ATIM_CH2B, and analog functions SEG27 and VLCD4. |
| 56 | PB04 | bidirectional | TTa analog-capable I/O with alternate functions UART3_CTS, GTIM4_ETR, UART4_RTS, UART2_RXD, SPI1_MISO, GTIM1_CH1 and ATIM_CH3B, and analog functions SEG26 and VLCD3. |
| 57 | PB05 | bidirectional | TTa analog-capable I/O with alternate functions UART4_RXD, GTIM3_CH4, LPTIM_CH1, UART2_RTS, SPI1_MOSI, GTIM1_CH2 and ATIM_CH1A, and analog functions SEG25 and VLCD2. |
| 58 | PB06 | bidirectional | TTa analog-capable I/O with alternate functions UART6_TXD, GTIM3_CH3, LPTIM_ETR, I2C1_SCL, SPI2_MOSI, GTIM1_TOGP and ATIM_CH2A, and analog functions SEG24 and VLCD1. |
| 59 | PB07 | bidirectional | TTa analog-capable I/O with alternate functions UART6_RXD, GTIM3_CH2, LPTIM_CH2, I2C1_SDA, SPI2_MISO, GTIM1_TOGN and ATIM_CH3A. |
| 60 | PF03/BOOT | input | Dedicated BOOT pin (structure B) that selects at startup between the internal bootloader and the user program; the table lists the pin type as input. |
| 61 | PB08 | bidirectional | TTa analog-capable I/O with alternate functions I2C1_SCL, GTIM3_CH1, UART5_TXD, GTIM4_CH2, SPI2_SCK, GTIM1_CH3 and ATIM_ETR, and analog function SEG53. |
| 62 | PB09 | bidirectional | TTa analog-capable I/O with alternate functions I2C1_SDA, GTIM4_CH1, UART5_RXD, IR_OUT, SPI2_CS, GTIM1_CH4 and ATIM_BK, and analog function SEG52. |
| 63 | VSS | power_in | Digital ground. |
| 64 | VDD | power_in | Digital supply of 1.65 V to 5.5 V for the I/O ports and internal regulator; all VDD pins must be powered at the same voltage. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | CW |
| Package | LQFP-64(10x10) |
| Category | Embedded Processors & Controllers |
| Pins | 64 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| 外供主电源电压 (VDD-VSS) | VDD-VSS | -0.3 | 6 | V | 45 | ||
| 外供模拟电源电压 (VDDA-VSS) | VDDA-VSS | -0.3 | 6 | V | 45 | ||
| VDD 大于 VDDA 时允许的最大差值 | VDD-VDDA | 0.3 | V | 45 | |||
| 不同 VDD 引脚间的压差 | /ΔVDDx/ | 0.05 | V | 45 | |||
| 不同 VSS 引脚间的压差 | /VSSX-VSS/ | 0.05 | V | 45 | |||
| 全部 VDD 供电线的灌电流总和（流入） | ΣIVDD | 120 | mA | 45 | |||
| 全部 VSS 供电线的拉电流总和（流出） | ΣIVSS | -120 | mA | 45 | |||
| 单个 VDD 供电线的灌电流总和（流入） | IVDD(PIN) | 100 | mA | 45 | |||
| 单个 VSS 供电线的拉电流总和（流出） | IVSS(PIN) | -100 | mA | 45 | |||
| 单个 I/O 或控制引脚灌入的电流 | IIO(PIN) | 25 | mA | 45 | |||
| 单个 I/O 或控制引脚输出的电流 | IIO(PIN) | -25 | mA | 45 | |||
| 全部 I/O 或控制引脚灌入的电流总和 | ΣIIO(PIN) | 80 | mA | 45 | |||
| 全部 I/O 或控制引脚输出的电流总和 | ΣIIO(PIN) | -80 | mA | 45 | |||
| TC 和 RST 引脚的注入电流 | IINJ(PIN) | -5 | 5 | mA | 45 | ||
| TTa 引脚的注入电流 | IINJ(PIN) | -5 | 5 | mA | 45 | ||
| 全部 I/O 或控制引脚注入的电流总和 | ΣIINJ(PIN) | -25 | 25 | mA | 45 | ||
| 储存温度范围 | TSTG | -65 | 150 | ℃ | 46 | ||
| 最大结温 | TJ | 105 | ℃ | 46 | |||
| 内部 AHB 总线频率 | fHCLK | 0 | 64 | MHz | VDD≥1.8V | 47 | |
| 内部 APB 总线频率 | fPCLK | 0 | 64 | MHz | VDD≥1.8V | 47 | |
| 内部 AHB 总线频率 | fHCLK | 0 | 24 | MHz | 1.65V ≤ VDD ＜ 1.8V | 47 | |
| 内部 APB 总线频率 | fPCLK | 0 | 24 | MHz | 1.65V ≤ VDD ＜ 1.8V | 47 | |
| 标准工作电压 | VDD | 1.65 | 5.5 | V | 47 | ||
| 模拟工作电压 | VDDA | 1.65 | 5.5 | V | 须等于 VDD | 47 | |
| I/O 输入电压 (TC I/O) | VIN | -0.3 | V | TC I/O | 47 | ||
| I/O 输入电压 (TTa I/O) | VIN | -0.3 | V | TTa I/O | 47 | ||
| BOOT 输入电压 | BOOT | 0 | V | 47 | |||
| 功率耗散 (LQFP64) | PD | 435 | mW | 温度标号 6：TA=85℃ | 47 | ||
| 环境温度（温度标号 6） | TA | -40 | 85 | ℃ | 最大功率耗散 | 47 | |
| 环境温度（温度标号 6） | TA | -40 | 105 | ℃ | 低功率耗散 | 47 | |
| 结温范围（温度标号 6） | TJ | -40 | 105 | ℃ | 47 | ||
| VDD 下降速率 | tVDD | 20 | μs/V | 47 | |||
| VDDA 下降速率 | tVDDA | 20 | μs/V | 47 | |||
| 上电/掉电复位门限（下降沿） | VPOR/BOR | 1.45 | 1.5 | 1.55 | V | 下降沿 | 48 |
| 上电/掉电复位门限（上升沿） | VPOR/BOR | 1.5 | 1.55 | 1.6 | V | 上升沿 | 48 |
| 复位持续时间 | tRSTTEMPO | 4 | 6.5 | 13 | ms | 48 | |
| 内部 1.5V 参考电压 | VREFINT1V5 | 1.485 | 1.5 | 1.515 | V | -40℃ < TA < +85℃ | 48 |
| 内部 2.5V 参考电压 | VREFINT2V5 | 2.475 | 2.5 | 2.525 | V | -40℃ < TA < +85℃ | 48 |
| 全温度范围内的内部参考电压分布 | ΔVREFINT | 10 | mV | VDDA = 3V | 48 | ||
| 温度系数 | TCoeff | -60 | 60 | ppm/℃ | 48 | ||
| 运行模式供电电流（代码自FLASH中运行）64MHz, PLL开 | IDD | 13.6 | 15 | mA | VDD=VDDA=5.5V; 全部外设打开; HSI或HSE, PLL开; 最大值 TA=85℃ | 49 | |
| 运行模式供电电流（代码自FLASH中运行）8MHz, PLL关 | IDD | 2.6 | 2.9 | mA | VDD=VDDA=5.5V; 全部外设打开; HSI或HSE, PLL关; 最大值 TA=85℃ | 49 | |
| 运行模式供电电流（代码自RAM中运行）64MHz, PLL开 | IDD | 12.5 | 13.7 | mA | VDD=VDDA=5.5V; 全部外设打开; HSI或HSE, PLL开; 最大值 TA=85℃ | 49 | |
| 运行模式供电电流（代码自RAM中运行）8MHz, PLL关 | IDD | 1.9 | 2.1 | mA | VDD=VDDA=5.5V; 全部外设打开; HSI或HSE, PLL关; 最大值 TA=85℃ | 49 | |
| Sleep 模式供电电流 64MHz, PLL开 | IDD | 9.2 | 10.2 | mA | VDD=VDDA=5.5V; 全部外设打开; HSI或HSE, PLL开; 最大值 TA=85℃ | 49 | |
| Sleep 模式供电电流 8MHz, PLL关 | IDD | 1.4 | 1.6 | mA | VDD=VDDA=5.5V; 全部外设打开; HSI或HSE, PLL关; 最大值 TA=85℃ | 49 | |
| DeepSleep 模式供电电流（全部振荡器关闭） | IDD | 0.6 | 8 | μA | 稳压器处于运行模式，全部振荡器关闭; 典型值 VDD=VDDA=3.6V; 最大值 TA=85℃ | 50 | |
| DeepSleep 模式供电电流（LSI 和 IWDT 打开） | IDD | 1.7 | 9 | μA | 稳压器处于运行模式，LSI 和 IWDT 打开; 典型值 VDD=VDDA=3.6V; 最大值 TA=85℃ | 50 | |
| 编程电压 | Vprog | 1.65 | 5.5 | V | 57 | ||
| Flash 寿命 | NNED | 20000 | 次 | TA = -40℃ ~ +85℃ | 57 | ||
| Flash 数据保存期限 | tRET | 25 | 年 | TA = 85℃ | 57 | ||
| 静电放电电压（人体模型） | VESD(HBM) | 8 | kV | TA = +25℃，符合 JESD22-A115C | 57 | ||
| 弱上拉等效电阻 | RPU | 50 | 80 | 180 | kΩ | VIN = VSS | 58 |
| 弱下拉等效电阻 | RPD | 20 | 30 | 45 | kΩ | VIN = VDDIOx | 58 |
| 高电平输出电压 | VOH | 3.02 | V | Sourcing 10mA, VDD = 3.3V | 59 | ||
| 低电平输出电压 | VOL | 0.23 | V | Sinking 10mA, VDD = 3.3V | 59 | ||
| NRST 弱上拉等效电阻 | RPU | 7 | 8 | 9 | kΩ | VIN = VSS | 61 |
| ADC 开启时的供电电压 | VDDA | 1.65 | 5.5 | V | 62 | ||
| ADC 综合误差 | ET | -3 | 3 | LSB | fADC = 24MHz, VDDA = 1.65V ~ 5.5V, TA = -40℃ ~+85℃ | 63 |
CAD (KiCad official)
- Symbol:
CW32L083RBT6 - Footprint:
Package_QFP:LQFP-64_10x10mm_P0.5mm - 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
- 3D model files:
cw32l083rbt6-etched.step/cw32l083rbt6-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cw32l083rbt6.step/cw32l083rbt6.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: CW datasheet (86 pp, sha256
a4e942461a3bb4c1, retrieved 2026-10-18, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).