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CW32L052R8T6

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CW Microcontroller Units (MCUs/MPUs/SOCs), LQFP-64(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentsingle chip microcomputer-microcontrollercw32l052r8t6factory-2.0.0extractor-text

Verified CW32L052R8T6

by Ray · last 13 Nov 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

13 Nov 2026RayPublished by the parts factory: tier lcsc, 64 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • •array (skip): not an array of element pairs
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: CW32L052R8T6 · LQFP-64(10x10) · 64 pins
  • ✓copper: 64 copper pads, none touching another net
  • ✓datasheet: all 64 pin names found in the 79-page datasheet
  • •distributor (warn): no ['digikey', 'mouser'] number
  • ✓family: LQFP-64_10x10mm_P0.5mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-p7a1yexv/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • ✓package_fit: height and body within the datasheet's package drawing (datasheet p.68)
  • ✓pads: 64 pins = 64 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 64 pins agree
  • ✓symbol_text: no pin names collide
  • ✓viewers: viewers/footprint.html 74 kB, viewers/symbol.html 41 kB
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ cw32l052r8t6.kicad_sym✓ cw32l052r8t6.kicad_mod✓ cw32l052r8t6.step
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CW32L052R8T6

CW · Microcontroller Units (MCUs/MPUs/SOCs) · LQFP-64(10x10)

CW32L052R8T6 from CW, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model). Symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 Vcore power_out Internal regulator supply output; it must be decoupled with a 1 μF capacitor to ground and is for internal circuit use only.
2 PC13 bidirectional Standard I/O (TC structure) with alternate functions RTC_1Hz, UART1_CTS, RTC_OUT, BTIM_ETR, GTIM3_ETR and RTC_TAMP.
3 PC14 bidirectional Standard I/O (TC structure) with alternate functions AUTOTRIM_ETR, GTIM1_CH4, UART1_RTS, UART1_TXD, SPI2_MISO, GTIM3_TOGP and GTIM3_CH1; analog function OSC32_IN.
4 PC15 bidirectional Standard I/O (TC structure) with alternate functions HSE_OUT, GTIM1_CH3, GTIM1_ETR, UART1_RXD, SPI2_MOSI, GTIM3_TOGN and GTIM3_CH2; analog function OSC32_OUT.
5 PF00 bidirectional Standard I/O (TC structure) with alternate functions AUTOTRIM_ETR, GTIM1_CH2, I2C1_SDA, BTIM1_TOGN, SPI2_SCK, GTIM2_TOGP and GTIM3_CH3; analog function OSC_IN.
6 PF01 bidirectional Standard I/O (TC structure) with alternate functions LSE_OUT, GTIM1_CH1, I2C1_SCL, BTIM1_TOGP, SPI2_CS, GTIM2_TOGN and GTIM3_CH4; analog function OSC_OUT.
7 NRST input Chip reset input with internal pull-up (8 kΩ typ.); VIL max 0.3VDD and a reset pulse shorter than 20 μs minimum is not guaranteed to reset the chip.
8 PC00 bidirectional 5V-tolerant-range TTa I/O with alternate functions UART1_CTS, GTIM2_CH4, SPI1_CS, LPTIM_CH1, UART2_RXD, ATIM_CH1A and I2C2_SCL; analog function SEG23.
9 PC01 bidirectional TTa I/O with alternate functions UART1_RTS, GTIM2_CH3, SPI1_SCK, LPTIM_OUT, UART2_TXD, ATIM_CH2A and I2C2_SDA; analog function SEG22.
10 PC02 bidirectional TTa I/O with alternate functions UART1_RXD, GTIM2_CH2, SPI1_MISO, LPTIM_CH2, UART1_TXD and ATIM_CH3A; analog function SEG21.
11 PC03 bidirectional TTa I/O with alternate functions UART1_TXD, GTIM2_CH1, SPI1_MOSI, LPTIM_ETR, UART1_RXD and ATIM_BK; analog function SEG20.
12 VSSA power_in Analog ground, referenced to VSS.
13 VDDA power_in Analog supply for ADC, reset circuit and internal RC oscillator, 1.65 V to 5.5 V, which must always be greater than or equal to VDD.
14 PA00 bidirectional TTa I/O with alternate functions UART3_CTS, UART2_CTS, RTC_TAMP, VC1_OUT, SPI2_MISO, GTIM2_CH1 and GTIM2_ETR; analog functions ADC_AIN0, VC1_CH0 and LVD_CH1.
15 PA01 bidirectional TTa I/O with alternate functions UART3_RTS, UART2_RTS, I2C2_SCL, LVD_OUT, SPI2_MOSI, GTIM2_CH2 and RTC_TAMP; analog functions ADC_AIN1, VC1_CH1 and SEG19.
16 PA02 bidirectional TTa I/O with alternate functions UART3_TXD, UART2_TXD, I2C2_SDA, VC2_OUT, SPI2_SCK, GTIM2_CH3 and AUTOTRIM_ETR; analog functions ADC_AIN2, VC1_CH2 and SEG18.
17 PA03 bidirectional TTa I/O with alternate functions UART3_RXD, UART2_RXD, GTIM2_CH2, PCLK_OUT, SPI2_CS, GTIM2_CH4 and ATIM_CH3A; analog functions ADC_AIN3, VC1_CH3 and SEG17.
18 PF04 bidirectional Standard I/O (TC structure) with alternate functions UART1_TXD, GTIM1_CH2 and UART2_RXD.
19 PF05 bidirectional Standard I/O (TC structure) with alternate functions UART1_RXD, BTIM_ETR, UART2_TXD and AUTOTRIM_ETR.
20 PA04 bidirectional TTa I/O with alternate functions UART1_TXD, UART2_CTS, I2C2_SCL, HCLK_OUT, SPI1_CS, GTIM2_ETR and ATIM_CH2A; analog functions ADC_AIN4 and VC1_CH4.
21 PA05 bidirectional TTa I/O with alternate functions GTIM2_ETR, UART2_RTS, I2C2_SDA, BTIM2_TOGN, SPI1_SCK, GTIM2_CH1 and ATIM_CH1A; analog functions ADC_AIN5 and VC1_CH5.
22 PA06 bidirectional TTa I/O with alternate functions GTIM3_CH1, UART2_TXD, VC1_OUT, BTIM2_TOGP, SPI1_MISO, GTIM1_CH1 and ATIM_BK; analog functions ADC_AIN6, VC1_CH6 and SEG16.
23 PA07 bidirectional TTa I/O with alternate functions GTIM2_CH1, UART2_RXD, VC2_OUT, BTIM1_TOGN, SPI1_MOSI, GTIM1_CH2 and ATIM_CH1B; analog functions ADC_AIN7, VC1_CH7 and SEG15.
24 PC04 bidirectional TTa I/O with alternate functions UART1_TXD, UART3_RXD, IR_OUT and LSI_OUT; analog functions ADC_AIN8 and SEG14.
25 PC05 bidirectional TTa I/O with alternate functions UART1_RXD, UART3_TXD, MCO_OUT, LPTIM_ETR and LPTIM_OUT; analog functions ADC_AIN9 and SEG13.
26 PB00 bidirectional TTa I/O with alternate functions UART2_RXD, UART1_CTS, I2C2_SCL, BTIM1_TOGP, HSIOSC_OUT, GTIM1_CH3 and ATIM_CH2B; analog functions ADC_AIN10/ExRef, VC2_CH0, LVD_CH2 and SEG12.
27 PB01 bidirectional TTa I/O with alternate functions UART2_TXD, UART1_RTS, I2C2_SDA, GTIM2_TOGP, BTIM3_TOGN, GTIM1_CH4 and ATIM_CH3B; analog functions ADC_AIN11, VC2_CH1 and SEG11.
28 PB02 bidirectional TTa I/O with alternate functions UART2_CTS, UART1_TXD, LPTIM_OUT, GTIM2_TOGN, BTIM3_TOGP, GTIM1_ETR and ATIM_CH1A; analog functions ADC_AIN12 and VC2_CH2.
29 PB10 bidirectional TTa I/O with alternate functions UART2_RTS, UART1_RXD, I2C1_SCL, I2C2_SCL, SPI2_SCK, GTIM2_CH3 and ATIM_CH2A; analog functions VC2_CH3 and SEG10.
30 PB11 bidirectional TTa I/O with alternate functions GTIM3_ETR, UART1_TXD, I2C1_SDA, I2C2_SDA, BTIM_ETR, GTIM2_CH4 and ATIM_CH3A; analog functions LVD_CH3 and SEG9.
31 VSS power_in Digital ground.
32 VDD power_in Digital supply for I/O and internal regulator, 1.65 V to 5.5 V; all VDD pins must be powered at the same voltage.
33 PB12 bidirectional TTa I/O with alternate functions GTIM2_TOGP, GTIM3_CH4, LSE_OUT, SPI2_CS, SPI1_CS, GTIM1_TOGP and ATIM_BK; analog function SEG8.
34 PB13 bidirectional TTa I/O with alternate functions GTIM2_TOGN, GTIM3_CH3, I2C2_SCL, SPI2_SCK, SPI1_SCK, GTIM1_TOGN and ATIM_CH1B; analog function SEG7.
35 PB14 bidirectional TTa I/O with alternate functions GTIM2_CH1, GTIM3_CH2, I2C2_SDA, SPI2_MISO, SPI1_MISO, RTC_OUT and ATIM_CH2B; analog function SEG6.
36 PB15 bidirectional TTa I/O with alternate functions GTIM2_CH2, GTIM3_CH1, BTIM2_TOGN, SPI2_MOSI, SPI1_MOSI, RTC_1Hz and ATIM_CH3B; analog function SEG5.
37 PC06 bidirectional TTa I/O with alternate functions UART1_RXD, UART3_TXD, BTIM2_TOGP, GTIM2_CH4 and ATIM_CH1B; analog function SEG4.
38 PC07 bidirectional TTa I/O with alternate functions UART1_TXD, UART3_RXD, BTIM2_TOGN, GTIM2_CH3 and ATIM_CH2B; analog function SEG3.
39 PC08 bidirectional TTa I/O with alternate functions UART1_CTS, UART3_TXD, GTIM3_ETR, GTIM2_CH2 and ATIM_CH3B; analog function SEG2.
40 PC09 bidirectional TTa I/O with alternate functions UART1_RTS, UART3_RXD, I2C1_SDA, GTIM2_CH1 and ATIM_ETR; analog function SEG1.
41 PA08 bidirectional TTa I/O with alternate functions LPTIM_ETR, UART1_TXD, BTIM2_TOGP, MCO_OUT, LVD_OUT, GTIM3_ETR and ATIM_CH1A; analog functions VC2_CH4 and SEG0.
42 PA09 bidirectional TTa I/O with alternate functions UART3_TXD, UART1_RXD, I2C1_SCL, BTIM1_TOGN, SPI1_CS, GTIM3_CH1 and ATIM_CH2A; analog functions VC2_CH5 and COM0.
43 PA10 bidirectional TTa I/O with alternate functions UART3_RXD, UART1_CTS, I2C1_SDA, BTIM1_TOGP, SPI1_SCK, GTIM3_CH2 and ATIM_CH3A; analog functions VC2_CH6 and COM1.
44 PA11 bidirectional TTa I/O with alternate functions UART3_CTS, UART1_RTS, I2C2_SCL, VC1_OUT, SPI1_MISO and GTIM3_CH3; analog functions VC2_CH7 and COM2.
45 PA12 bidirectional TTa I/O with alternate functions UART3_RTS, BTIM_ETR, I2C2_SDA, VC2_OUT, SPI1_MOSI, GTIM3_CH4 and ATIM_ETR; analog function COM3.
46 PA13/SWDIO bidirectional Standard I/O (TC structure) with alternate functions I2C1_SDA, UART1_RXD, UART2_TXD, I2C2_SCL and IR_OUT; after reset it is configured as SWDIO with internal pull-up enabled.
47 PF06 bidirectional Standard I/O (TC structure) with alternate functions UART3_CTS, I2C1_SCL, GTIM1_TOGP, UART2_CTS, I2C2_SCL, GTIM3_TOGP and BTIM3_TOGN.
48 PF07 bidirectional Standard I/O (TC structure) with alternate functions UART3_RTS, I2C1_SDA, GTIM1_TOGN, UART2_RTS, I2C2_SDA, GTIM3_TOGN and BTIM3_TOGP.
49 PA14/SWCLK bidirectional Standard I/O (TC structure) with alternate functions UART3_TXD, I2C1_SCL, UART1_TXD, UART2_RXD and I2C2_SDA; after reset it is configured as SWCLK with internal pull-up enabled.
50 PA15 bidirectional TTa I/O with alternate functions UART3_RXD, GTIM2_CH1, UART1_RXD, UART2_TXD, SPI1_CS, GTIM2_ETR and ATIM_CH1B; analog function SEG55.
51 PC10 bidirectional TTa I/O with alternate functions UART1_TXD, GTIM3_CH1, HCLK_OUT, BTIM1_TOGP, VC1_OUT, LPTIM_CH1 and ATIM_CH2B; analog functions SEG31 and COM4.
52 PC11 bidirectional TTa I/O with alternate functions UART1_RXD, GTIM3_CH2, IR_OUT, BTIM1_TOGN, VC2_OUT, LPTIM_CH2 and ATIM_CH3B; analog functions SEG30 and COM5.
53 PC12 bidirectional TTa I/O with alternate functions UART2_TXD, PCLK_OUT, LVD_OUT, UART3_RXD and HSIOSC_OUT; analog functions SEG29 and COM6.
54 PD02 bidirectional TTa I/O with alternate functions UART2_RXD, GTIM1_CH1, BTIM_ETR, UART3_TXD, RTC_1Hz, GTIM3_ETR and ATIM_ETR; analog function SEG28 and COM7.
55 PB03 bidirectional TTa I/O with alternate functions UART3_RTS, GTIM2_CH2, UART1_CTS, UART2_TXD, SPI1_SCK, GTIM1_ETR and ATIM_CH2B; analog functions SEG27 and VLCD4.
56 PB04 bidirectional TTa I/O with alternate functions UART3_CTS, GTIM2_ETR, UART1_RTS, UART2_RXD, SPI1_MISO, GTIM1_CH1 and ATIM_CH3B; analog functions SEG26 and VLCD3.
57 PB05 bidirectional TTa I/O with alternate functions UART1_RXD, GTIM3_CH4, LPTIM_CH1, UART2_RTS, SPI1_MOSI, GTIM1_CH2 and ATIM_CH1A; analog functions SEG25 and VLCD2.
58 PB06 bidirectional TTa I/O with alternate functions UART3_TXD, GTIM3_CH3, LPTIM_ETR, I2C1_SCL, SPI2_MOSI, GTIM1_TOGP and ATIM_CH2A; analog functions SEG24 and VLCD1.
59 PB07 bidirectional TTa I/O with alternate functions UART3_RXD, GTIM3_CH2, LPTIM_CH2, I2C1_SDA, SPI2_MISO, GTIM1_TOGN and ATIM_CH3A.
60 PF03/BOOT input BOOT pin sampled at startup to select between running the internal Bootloader and running the user program.
61 PB08 bidirectional TTa I/O with alternate functions I2C1_SCL, GTIM3_CH1, UART2_TXD, GTIM2_CH2, SPI2_SCK, GTIM1_CH3 and ATIM_ETR; analog function SEG53.
62 PB09 bidirectional TTa I/O with alternate functions I2C1_SDA, GTIM2_CH1, UART2_RXD, IR_OUT, SPI2_CS, GTIM1_CH4 and ATIM_BK; analog function SEG52.
63 VSS power_in Digital ground.
64 VDD power_in Digital supply for I/O and internal regulator, 1.65 V to 5.5 V; all VDD pins must be powered at the same voltage.

Key specifications

Parameter Value
Manufacturer CW
Package LQFP-64(10x10)
Category Single Chip Microcomputer/Microcontroller
Pins 64

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
外供主电源电压 VDD-VSS VDD - VSS -0.3 6 V 41
外供模拟电源电压 VDDA-VSS VDDA-VSS -0.3 6 V 41
VDD 大于 VDDA 时允许的最大差值 VDD-VDDA 0.3 V 41
全部 VDD 供电线的灌电流总和（流入） ΣIVDD 120 mA 41
全部 VSS 供电线的拉电流总和（流出） ΣIVSS -120 mA 41
单个 VDD 供电线的灌电流总和（流入） IVDD(PIN) 100 mA 41
单个 VSS 供电线的拉电流总和（流出） IVSS(PIN) -100 mA 41
单个 I/O 或控制引脚灌入的电流 IIO(PIN) 25 mA 灌入 (sink) 41
单个 I/O 或控制引脚输出的电流 IIO(PIN) -25 mA 输出 (source) 41
全部 I/O 或控制引脚灌入的电流总和 ΣIIO(PIN) 80 mA 41
全部 I/O 或控制引脚输出的电流总和 ΣIIO(PIN) -80 mA 41
TC 和 RST 引脚的注入电流 IINJ(PIN) -5 5 mA 41
TTa 引脚的注入电流 IINJ(PIN) -5 5 mA 41
全部 I/O 或控制引脚注入的电流总和 ΣIINJ(PIN) -25 25 mA 41
储存温度范围 TSTG -65 150 ℃ 42
最大结温 TJ 105 ℃ 42
静电放电电压（人体模式） VESD(HBM) 8 kV TA=+25℃，符合 JESD22-A115C 53
内部 AHB 总线频率 (VDD≥1.8V) fHCLK 0 48 MHz VDD≥ 1.8V 43
内部 APB 总线频率 (VDD≥1.8V) fPCLK 0 48 MHz VDD≥ 1.8V 43
内部 AHB 总线频率 (1.65V ≤ VDD < 1.8V) fHCLK 0 24 MHz 1.65V ≤ VDD ＜ 1.8V 43
内部 APB 总线频率 (1.65V ≤ VDD < 1.8V) fPCLK 0 24 MHz 1.65V ≤ VDD ＜ 1.8V 43
标准工作电压 VDD 1.65 5.5 V 43
模拟工作电压 VDDA 1.65 5.5 V 须等于 VDD 43
功率耗散 LQFP64（温度标号 6） PD 435 mW TA=85℃ 43
环境温度（温度标号 6，最大功率耗散） TA -40 85 ℃ 最大功率耗散 43
环境温度（温度标号 6，低功率耗散） TA -40 105 ℃ 低功率耗散 43
结温范围（温度标号 6） TJ -40 105 ℃ 温度标号 6 43
VDD 上升速率 tVDD 0 μs/V 43
VDD 下降速率 tVDD 20 μs/V 43
VDDA 上升速率 tVDDA 0 μs/V 43
VDDA 下降速率 tVDDA 20 μs/V 43
上电/掉电复位门限（下降沿） VPOR/BOR 1.45 1.5 1.55 V 下降沿 44
上电/掉电复位门限（上升沿） VPOR/BOR 1.5 1.55 1.6 V 上升沿 44
BOR 迟滞 VBORhyst 50 mV 44
复位持续时间 tRSTTEMPO 4 6.5 13 ms 44
内部 1.5V 参考电压 VREFINT1V5 1.485 1.5 1.515 V -40℃ < TA < +85℃ 44
内部 2.5V 参考电压 VREFINT2V5 2.475 2.5 2.525 V -40℃ < TA < +85℃ 44
全温度范围内的内部参考电压分布 ΔVREFINT 10 mV VDDA = 3V 44
内部参考电压温度系数 TCoeff -60 60 ppm/℃ 44
运行模式供电电流（FLASH 运行，48MHz） IDD 8.2 8.6 mA fHCLK=48MHz; VDD=VDDA=5.5V; TA=85℃; 全部外设打开; HSI 或 HSE 45
运行模式供电电流（FLASH 运行，24MHz） IDD 5.6 6 mA fHCLK=24MHz; VDD=VDDA=5.5V; TA=85℃; 全部外设打开; HSI 或 HSE 45
运行模式供电电流（FLASH 运行，8MHz） IDD 2.3 2.6 mA fHCLK=8MHz; VDD=VDDA=5.5V; TA=85℃; 全部外设打开; HSI 或 HSE 45
Sleep 模式供电电流（代码自 FLASH 或 RAM 中运行，48MHz） IDD 4.6 4.9 mA fHCLK=48MHz; VDD=VDDA=5.5V; TA=85℃; 全部外设打开; HSI 或 HSE 45
DeepSleep 模式供电电流（稳压器运行模式，全部振荡器关闭） IDD 0.5 7 μA 典型值: VDD=VDDA=3.3V; 最大值: TA=85℃ 46
DeepSleep 模式供电电流（稳压器运行模式，LSI 和 IWDT 打开） IDD 1.4 8 μA 典型值: VDD=VDDA=3.3V; 最大值: TA=85℃ 46
DeepSleep 模式供电电流（稳压器运行模式，LSE 打开） IDD 0.9 7.8 μA 典型值: VDD=VDDA=3.3V; 最大值: TA=85℃ 46
从 DeepSleep 模式唤醒时间 tWUDEEP 4 5 μs 稳压器处于运行模式; VDD=VDDA=3.3V (典型值) 48
高电平输出电压（源电流 10mA） VOH 3.02 V Sourcing 10mA, VDD = 3.3V 55
高电平输出电压（源电流 20mA） VOH 2.7 V Sourcing 20mA, VDD = 3.3V 55
低电平输出电压（灌电流 10mA） VOL 0.23 V Sinking 10mA, VDD = 3.3V 55
低电平输出电压（灌电流 20mA） VOL 0.45 V Sinking 20mA, VDD = 3.3V 55
弱上拉等效电阻 RPU 50 80 180 kΩ VIN = VSS 54
弱下拉等效电阻 RPD 20 30 45 kΩ VIN = VDDIOx 54
NRST 弱上拉等效电阻 RPU 7 8 9 kΩ VIN = VSS 57
高速外部振荡器频率（HSE 晶体/陶瓷谐振器） fOSC_IN 4 8 32 MHz 50
HSE 电流消耗（启动） IDD 900 μA 启动 50
HSI 工厂校准精度 ACCHSI -2 2 % TA = -40℃ ~ +85℃ 51
HSI 工厂校准精度 ACCHSI -0.5 0.5 % TA = +25℃ 51
ADC 综合误差 ET -3 2.5 3 LSB fADC = 24MHz, VDDA = 1.65V ~ 5.5V, TA = -40℃ ~ +85℃ 59
FLASH 寿命 NNED 20000 次 TA = -40℃ ~ +85℃ 52

CAD (KiCad official)

  • Symbol: CW32L052R8T6
  • Footprint: Package_QFP:LQFP-64_10x10mm_P0.5mm
  • 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
  • 3D model files: cw32l052r8t6-etched.step / cw32l052r8t6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cw32l052r8t6.step / cw32l052r8t6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: CW datasheet (79 pp, sha256 eed9d435f5af5b43, retrieved 2026-11-13, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF