CW32F030F6P6

{
  "slug": "cw32f030f6p6",
  "version": "0.1.0",
  "type": "component",
  "description": "CW Microcontrollers (MCU/MPU/SOC), TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "embedded processors & controllers",
    "cw32f030f6p6",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "cw32f030f6p6.kicad_sym",
    "cw32f030f6p6.kicad_mod",
    "cw32f030f6p6.glb",
    "cw32f030f6p6.step",
    "cw32f030f6p6.lbr",
    "docs/hero.png",
    "docs/cw32f030f6p6-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "cw32f030f6p6-hero.glb",
    "cw32f030f6p6-hero.overlay.json",
    "cw32f030f6p6-etched.glb"
  ],
  "component": {
    "mpn": "CW32F030F6P6",
    "manufacturer": "CW",
    "package": "TSSOP-20",
    "pin_count": 20,
    "category": "Embedded Processors & Controllers",
    "subcategory": "Microcontrollers (MCU/MPU/SOC)",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590237041901400064",
    "parts": {
      "symbol": "cw32f030f6p6.kicad_sym",
      "footprint": "cw32f030f6p6.kicad_mod",
      "model_3d": "cw32f030f6p6-hero.glb",
      "model_3d_plain": "cw32f030f6p6-etched.glb",
      "model_3d_step": "cw32f030f6p6-etched.step",
      "model_3d_step_plain": "cw32f030f6p6.step",
      "lbr": "cw32f030f6p6.lbr"
    },
    "distributor_links": {
      "lcsc": "C5122785"
    },
    "distributor_check": {
      "checked_at": "2026-10-19T06:59:19Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "no match"
      },
      "mouser": {
        "pn": null,
        "status": "no match"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "PF03/BOOT",
        "type": "input",
        "description": "Dedicated BOOT pin (I/O structure B) sampled at startup to choose between the internal Bootloader (ISP over UART1 on PA13/PA14) and the user program."
      },
      {
        "number": "2",
        "name": "PF00",
        "type": "bidirectional",
        "description": "GPIO with TC structure whose analog function OSC_IN is the HSE oscillator input for a 4-32 MHz crystal/ceramic resonator (1-32 MHz external clock in bypass mode, VIH min 0.7×VDDIOx)."
      },
      {
        "number": "3",
        "name": "PF01",
        "type": "bidirectional",
        "description": "GPIO with TC structure whose analog function OSC_OUT is the HSE oscillator output for a 4-32 MHz crystal/ceramic resonator; the same pin can also carry LSE_OUT for the 32.768 kHz crystal."
      },
      {
        "number": "4",
        "name": "NRST",
        "type": "input",
        "description": "Chip reset input with internal pull-up of 7-9 kΩ (8 kΩ typ.); the input must be kept below 0.3×VDD and the reset pulse must be at least 20 µs."
      },
      {
        "number": "5",
        "name": "VDDA",
        "type": "power_in",
        "description": "Analog supply 1.65 V to 5.5 V for the ADC, reset circuit, internal RC oscillators and PLL, which must always be greater than or equal to VDD."
      },
      {
        "number": "6",
        "name": "PA00",
        "type": "bidirectional",
        "description": "TTa-structure GPIO used as ADC_IN0 (conversion range 0 to VDDA) and also providing VC1_CH0 and LVD_CH1 analog inputs, with digital alternates UART3_CTS, UART2_CTS, RTC_TAMP, VC1_OUT, SPI2_MISO, GTIM2_CH1 and GTIM2_ETR."
      },
      {
        "number": "7",
        "name": "PA01",
        "type": "bidirectional",
        "description": "TTa-structure GPIO used as ADC_IN1 (0 to VDDA) and VC1_CH1, with digital alternates UART3_RTS, UART2_RTS, I2C2_SCL, LVD_OUT, SPI2_MOSI, GTIM2_CH2 and RTC_TAMP."
      },
      {
        "number": "8",
        "name": "PA02",
        "type": "bidirectional",
        "description": "TTa-structure GPIO used as ADC_IN2 (0 to VDDA) and VC1_CH2, with digital alternates UART3_TXD, UART2_TXD, I2C2_SDA, VC2_OUT, SPI2_SCK, GTIM2_CH3 and AWT_ETR."
      },
      {
        "number": "9",
        "name": "PA03",
        "type": "bidirectional",
        "description": "TTa-structure GPIO used as ADC_IN3 (0 to VDDA) and VC1_CH3, with digital alternates UART3_RXD, UART2_RXD, GTIM2_CH2, PCLK_OUT, SPI2_CS, GTIM2_CH4 and ATIM_CH3A."
      },
      {
        "number": "10",
        "name": "PA04",
        "type": "bidirectional",
        "description": "TTa-structure GPIO used as ADC_IN4 (0 to VDDA) and VC1_CH4, with digital alternates UART2_CTS, I2C2_SCL, HCLK_OUT, SPI1_CS, GTIM2_ETR and ATIM_CH2A."
      },
      {
        "number": "11",
        "name": "PA05",
        "type": "bidirectional",
        "description": "TTa-structure GPIO used as ADC_IN5 (0 to VDDA) and VC1_CH5/VC2_CH0, with digital alternates GTIM2_ETR, UART2_RTS, I2C2_SDA, BTIM2_TOGP, SPI1_SCK, GTIM2_CH1 and ATIM_CH1A."
      },
      {
        "number": "12",
        "name": "PA06",
        "type": "bidirectional",
        "description": "TTa-structure GPIO used as ADC_IN6 (0 to VDDA) and VC1_CH6/VC2_CH1, with digital alternates GTIM3_CH1, UART2_TXD, VC1_OUT, BTIM2_TOGN, SPI1_MISO, GTIM1_CH1 and ATIM_BK."
      },
      {
        "number": "13",
        "name": "PA07",
        "type": "bidirectional",
        "description": "TTa-structure GPIO used as ADC_IN7 (0 to VDDA) and VC1_CH7/VC2_CH2, with digital alternates GTIM4_CH1, UART2_RXD, VC2_OUT, BTIM1_TOGP, SPI1_MOSI, GTIM1_CH2 and ATIM_CH1B."
      },
      {
        "number": "14",
        "name": "PB01",
        "type": "bidirectional",
        "description": "TTa-structure GPIO used as ADC_IN9 (0 to VDDA) and VC2_CH4, with digital alternates UART2_TXD, UART1_RTS, I2C2_SDA, GTIM4_TOGN, BTIM3_TOGP, GTIM1_CH4 and ATIM_CH3B."
      },
      {
        "number": "15",
        "name": "VSS",
        "type": "power_in",
        "description": "Ground reference for the digital supply and I/O; all VSS pins must be connected to the same ground."
      },
      {
        "number": "16",
        "name": "VDD",
        "type": "power_in",
        "description": "I/O and internal regulator supply 1.65 V to 5.5 V; all VDD pins must be powered at the same voltage."
      },
      {
        "number": "17",
        "name": "PA09",
        "type": "bidirectional",
        "description": "TC-structure GPIO with digital alternates UART3_TXD, UART1_RXD, I2C1_SCL, BTIM1_TOGP, SPI1_CS, GTIM3_CH1 and ATIM_CH2A (no analog function)."
      },
      {
        "number": "18",
        "name": "PA10",
        "type": "bidirectional",
        "description": "TC-structure GPIO with digital alternates UART3_RXD, UART1_CTS, I2C1_SDA, BTIM1_TOGN, SPI1_SCK, GTIM3_CH2 and ATIM_CH3A (no analog function)."
      },
      {
        "number": "19",
        "name": "PA13/SWDIO",
        "type": "bidirectional",
        "description": "TC-structure GPIO that is configured as the SWDIO debug data line after reset with its internal pull-up enabled by default; alternates include I2C1_SDA, UART1_RXD, UART2_RXD, I2C2_SCL and IR_OUT."
      },
      {
        "number": "20",
        "name": "PA14/SWCLK",
        "type": "bidirectional",
        "description": "TC-structure GPIO that is configured as the SWCLK debug clock after reset with its internal pull-up enabled by default; alternates include UART3_TXD, I2C1_SCL, UART1_TXD, UART2_TXD and I2C2_SDA."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: MPN mismatch: the datasheet's ordering table lists the TSSOP20 part as CW32F030F6P7 (Tube, 70 pcs), ; The TSSOP20 pin-diagram figure (Figure 5-3) is garbled in the text extraction, so pin-number-to-posi; Pin 1 is the BOOT pin (PF03/BOOT), not VDD: table 5-2 lists VDD on pin 1 only for LQFP48/LQFP32/QFN3"
        ],
        "pages_sent": 66,
        "cost_usd": 0.2268,
        "at": "2026-10-19T06:57:10"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590237041901400064",
        "pages": 72,
        "sha256": "a3ae82a897ab1ca3",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 20,
        "described": 20,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "cw32f030f6p6.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.4,
          6.5,
          1.2
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "97339947f3a7196470ec2f1d9f9b92bb2fc2ab66ad53be0cf105192585ef3c9a",
        "checked": "2026-10-19",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "cw32f030f6p6-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.4,
          6.5,
          1.2
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "526c12de4f06c9720ed82ca50e5e50724d4a5b3a9cbe8f5c362d46ae7a8e1ccb",
        "checked": "2026-10-19",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}