component

CT417-HSN850MR

Public Made by Adom

by adom

Allegro MicroSystems, LLC Current Sensors, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentmagnetic sensorsct417-hsn850mrfactory-2.0.0extractor-text

Verified CT417-HSN850MR

by Ray · last 12 Nov 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

12 Nov 2026RayPublished by the parts factory: tier lcsc, 8 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: CT417-HSN850MR · SOIC-8 · 8 pins
  • ✓copper: 8 copper pads, none touching another net
  • ✓datasheet: all 8 pin names found in the 27-page datasheet
  • ✓distributor: lcsc C27665012, digikey 620-CT417-HSN850MRTR-ND, mouser 462-CT417-HSN850MR
  • ✓family: SOIC-8_3.9x4.9mm_P1.27mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-xlwc2dur/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • ✓package_fit: height and body within the datasheet's package drawing (datasheet p.23)
  • ✓pads: 8 pins = 8 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 8 pins agree
  • ✓symbol_text: no pin names collide
  • ✓viewers: viewers/footprint.html 24 kB, viewers/symbol.html 10 kB
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ ct417-hsn850mr.kicad_sym✓ ct417-hsn850mr.kicad_mod✓ ct417-hsn850mr.step
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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray
viewers ct417-hsn850mr: viewers rendered from the public page · Ray
ct417-hsn850mr-etched.glb Publish 0.1.0 · Ray
ct417-hsn850mr-etched.step ct417-hsn850mr: factory component page (tier=lcsc) · Ray
ct417-hsn850mr-hero.glb ct417-hsn850mr: hero GLB from the etched model (keeps the MPN mark) · Ray
ct417-hsn850mr-hero.overlay.json ct417-hsn850mr: hero GLB from the etched model (keeps the MPN mark) · Ray
ct417-hsn850mr.glb Publish 0.1.0 · Ray
ct417-hsn850mr.kicad_mod Publish 0.1.0 · Ray
ct417-hsn850mr.kicad_sym Publish 0.1.0 · Ray
ct417-hsn850mr.lbr Publish 0.1.0 · Ray
ct417-hsn850mr.step Publish 0.1.0 · Ray
package.json Publish 0.1.0 · Ray
page.json Set visibility: public · Ray
README.md Publish 0.1.0 · Ray
verification.json Verified: Published by the parts factory: tier lcsc, 8 pins · Ray

CT417-HSN850MR

Allegro MicroSystems, LLC · Current Sensors · SOIC-8

CT417-HSN850MR from Allegro MicroSystems, LLC, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IP+ passive Input primary conductor (positive) of the integrated current carrying conductor, tied internally to pin 2.
2 IP+ passive Input primary conductor (positive) of the integrated current carrying conductor, tied internally to pin 1.
3 IP- passive Primary conductor (negative) of the integrated current carrying conductor, tied internally to pin 4.
4 IP- passive Primary conductor (negative) of the integrated current carrying conductor, tied internally to pin 3.
5 GND power_in Ground reference for the device.
6 FLT output Active-low open-drain fault output signaling overcurrent detection or UVLO; if unused, a 1.0 nF capacitor must be connected from the pin to ground.
7 OUT output Analog output voltage representing the measured current, with drive capability of ±1.0 mA and maximum 100 pF capacitive load.
8 VCC power_in Supply voltage of 3.0 to 3.6 V (3.3 V typical), bypassed with a 1.0 µF capacitor placed close to the pin.

Key specifications

Parameter Value
Manufacturer Allegro MicroSystems, LLC
Package SOIC-8
Category Magnetic Sensors
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply Current ICC 6 9 mA fBW = 1 MHz, no load, IP = 0 A 6
OUT Maximum Drive Capability IOUT -1 1 mA OUT covers 10% to 90% of VCC span 6
OUT Capacitive Load CL_OUT 100 pF 6
OUT Voltage Linear Range, Typical VOUT 0.65 2.65 V VSIG_AC = ±1.00 V, VSIG_DC = +2.00 V 6
FLT Voltage Low VFLT#_OL 0 0.5 V IFLT#_OUT ≤ 20 mA 6
Power-On Time tON 100 200 µs VCC ≥ 2.50 V 6
Current Range IRANGE -50 50 A 16
Voltage Output Quiescent VOQ 1.645 1.65 1.655 V TA = 25°C, IP = 0 A 16
Total Output Error ETOT -3 3 % FS IP sweep from IP(MIN) to IP(MAX) 16
Supply Voltage Range VCC 3 3.3 3.6 V 3
Output Voltage Range VOUT 0 V max printed as VCC 3
Output Current IOUT -1 1 mA 3
Operating Ambient Temperature TA -40 25 125 °C Extended Industrial 3
Supply Voltage VCC -0.3 6 V 3
Analog Input/Output Pins Maximum Voltage VI/O -0.3 V max printed as VCC + 0.3 (lower of VCC + 0.3 V or 6.0 V) 3
Current Carrying Conductor Maximum Current ICCC(MAX) 70 A TA = 25°C 3
Dielectric Surge Strength Test Voltage VSURGE 6 kV IEC 61000-4-5: Tested ±5 Pulses at 2/60 seconds, 1.2 µs (rise) and 50 µs (width) 3
Surge Strength Test Current ISURGE 3 kA Tested ±5 Pulses at 3/60 seconds, 8.0 µs (rise) and 20 µs (width) 3
ESD Human Body Model ESD -2 2 kV HBM per JESD22-A114 3
ESD Charged Device Model ESD -0.5 0.5 kV CDM per JESD22-C101 3
Junction Temperature TJ -40 150 °C 3
Storage Temperature TSTG -65 155 °C 3
Lead Soldering Temperature TL 260 °C 10 seconds 3
Sensitivity S 20 mV/A IRANGE(MIN) < IP < IRANGE(MAX) 16
Bandwidth fBW 1 MHz Small Signal = -3 dB 16
Noise eN 19 mARMS TA = 25°C, fBW = 100 kHz 16
Linearity Error ELIN 0.1 % FS IP = IP(MAX), TA = -40°C to 125°C 16
Sensitivity Error ESENS 0.2 % IP = IP(MAX), TA = 25°C 16
Sensitivity Error ESENS 2.5 % IP = IP(MAX), TA = 125°C 16
Sensitivity Error ESENS 2.7 % IP = IP(MAX), TA = -40°C 16
Offset Voltage Error VOE 2 mV IP = 0 A, TA = 25°C 16
Offset Voltage Error VOE 15 mV IP = 0 A, TA = 125°C 16
Offset Voltage Error VOE 19 mV IP = 0 A, TA = -40°C 16
Total Error Including Lifetime Drift ETOT(DRIFT) 2.6 % FS IP = IP(MAX), TA = -40°C to 125°C 16
Sensitivity Error Including Lifetime Drift ESENS(DRIFT) 3.7 % IP = IP(MAX), TA = -40°C to 125°C 16
Offset Voltage Error Including Lifetime Drift VOE(DRIFT) 26 mV IP = 0 A, TA = -40°C to 125°C 16
High-Impedance Output Leakage Current ILEAK_FLT# 5 µA VFLT#_OH = VCC 6
OUT Resistive Load RL_OUT 100 kΩ 6
Primary Conductor Resistance RIP 1 mΩ 6
Power Supply Rejection Ratio PSRR 35 dB 6
Sensitivity Power Supply Rejection Ratio SPSRR 35 dB 6
Offset Power Supply Rejection Ratio OPSRR 40 dB 6
Common Mode Field Rejection Ratio CMFRR -40 dB 6
FLT Pull-Up Resistor RPU 100 kΩ 6
Rise Time tRISE 200 ns IP = IRANGE(MAX), TA = 25°C, CL = 100 pF 6
Response Time tRESPONSE 300 ns IP = IRANGE(MAX), TA = 25°C, CL = 100 pF 6
Propagation Delay tDELAY 250 ns IP = IRANGE(MAX), TA = 25°C, CL = 100 pF 6
FLT Response Time tFLT# 250 ns 6
Undervoltage Lockout Rising VUVLO 2.5 V Rising VDD 6
Undervoltage Lockout Falling VUVLO 2.45 V Falling VDD 6
UVLO Hysteresis VUV_HYS 50 mV 6

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts copper CCC pins be connected to as much copper area as possible. It is 22

CAD (KiCad official)

  • Symbol: CT417-HSN850MR
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: ct417-hsn850mr-etched.step / ct417-hsn850mr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ct417-hsn850mr.step / ct417-hsn850mr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Allegro MicroSystems, LLC datasheet (27 pp, sha256 b2fcdb1ea5c594ce, retrieved 2026-11-12, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF