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CSU8RP3215-SOP16
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CHIPSEA Microcontrollers (MCU/MPU/SOC), SOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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CSU8RP3215-SOP16
CHIPSEA · Microcontrollers (MCU/MPU/SOC) · SOP-16
CSU8RP3215-SOP16 from CHIPSEA, in a SOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VSS | power_in | Ground pin (地). |
| 2 | PT1.1/INT1/XIN/RI/TI | bidirectional | General-purpose I/O with open-drain output capability, external interrupt 1 input with wake-up function, external crystal input, UART receive and UART transmit (UART TX/RX selectable on PT1.1, PT1.2, PT3.3 or PT3.4 per the datasheet); PT1.1 can also serve as external RC clock input, depending on the XTAL_PIN code option. |
| 3 | PT1.2/INT1/XOUT/RI/TI | bidirectional | General-purpose I/O with external interrupt 1 input with wake-up function, external crystal output, UART receive and UART transmit. |
| 4 | PT1.3/INT1/RST/VPP | input | Input-only pin with external interrupt 1 input with wake-up function, reset input (external hardware reset is enabled by the RESET_PIN code option, active low, Schmitt trigger) and programming voltage VPP. |
| 5 | PT1.4/INT1/PWM2/BZ2/T4/PDA | bidirectional | General-purpose I/O with external interrupt 1 input with wake-up function, PWM2 output, buzzer 2 output, timer/counter 4 external input, and OTP programming data line (PDA). |
| 6 | PT1.5/INT1/PWM3/BZ3/PCL | bidirectional | General-purpose I/O with external interrupt 1 input with wake-up function, PWM3 output, buzzer 3 output, and OTP programming clock line (PCL). |
| 7 | PT1.6/INT1/PWM4/BZ4 | bidirectional | General-purpose I/O with external interrupt 1 input with wake-up function, PWM4 output and buzzer 4 output. |
| 8 | PT1.7/INT1 | bidirectional | General-purpose I/O with external interrupt 1 input with wake-up function. |
| 9 | PT3.6/AIN6/PWM4/PWM3H | bidirectional | General-purpose I/O with open-drain output capability (pull-down enabled by default), ADC input 6, PWM4 output and PWM3H output. |
| 10 | PT3.5/AIN5/PWM3/PWM3L | bidirectional | General-purpose I/O with open-drain output capability, ADC input 5, PWM3 output and PWM3L output. |
| 11 | PT3.4/AIN4/RI/TI | bidirectional | General-purpose I/O (pull-down enabled by default), ADC input 4, UART receive and UART transmit. |
| 12 | PT3.3/AIN3/CO/RI/TI | bidirectional | General-purpose I/O, ADC input 3, comparator output, UART receive and UART transmit. |
| 13 | PT3.2/AIN2/C0N/VREF | bidirectional | General-purpose I/O, ADC input 2, comparator negative input and ADC reference voltage input. |
| 14 | PT3.1/AIN1/C0P/INT1/T3 | bidirectional | General-purpose I/O, ADC input 1, comparator positive input, external interrupt 1 input with wake-up function, and timer/counter 3 external input. |
| 15 | PT3.0/AIN0/VREF/INT0/T2 | bidirectional | General-purpose I/O with selectable input logic level (VTHP30), ADC input 0, ADC reference voltage input / internal reference voltage output, external interrupt 0 input with wake-up function, and timer/counter 2 external input. |
| 16 | VDD | power_in | Power supply pin. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | CHIPSEA |
| Package | SOP-16 |
| Category | Embedded Processors & Controllers |
| Pins | 16 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage VDD (absolute maximum) | VDD | -0.3 | 6 | V | 112 | ||
| Pin input voltage (absolute maximum) | -0.3 | V | 112 | ||||
| Operating temperature | -40 | 85 | ºC | 112 | |||
| Storage temperature | -55 | 150 | ºC | 112 | |||
| Soldering temperature | 220 | ºC | 10 s | 112 | |||
| Operating voltage VDD | VDD | 2.2 | 5 | 5.5 | V | 25 ºC | 112 |
| Operating voltage VDD | VDD | 2.3 | 5 | 5.5 | V | -40 ºC ~+85 ºC | 112 |
| Digital input high level PT3.0 | VIH3 | 0.7 | V | VTHP30=01 | 113 | ||
| Digital input low level PT3.0 | VIL3 | 0.7 | V | VTHP30=01 | 113 |
CAD (KiCad official)
- Symbol:
CSU8RP3215-SOP16 - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SOP-16 (KiCad packages3D, STEP)
- 3D model files:
csu8rp3215-sop16-etched.step/csu8rp3215-sop16-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);csu8rp3215-sop16.step/csu8rp3215-sop16.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: CHIPSEA datasheet (132 pp, sha256
c847063ee2c549e1, retrieved 2026-10-18, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# CSU8RP3215-SOP16
**CHIPSEA** · Microcontrollers (MCU/MPU/SOC) · SOP-16
CSU8RP3215-SOP16 from CHIPSEA, in a SOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VSS | power_in | Ground pin (地). |
| 2 | PT1.1/INT1/XIN/RI/TI | bidirectional | General-purpose I/O with open-drain output capability, external interrupt 1 input with wake-up function, external crystal input, UART receive and UART transmit (UART TX/RX selectable on PT1.1, PT1.2, PT3.3 or PT3.4 per the datasheet); PT1.1 can also serve as external RC clock input, depending on the XTAL_PIN code option. |
| 3 | PT1.2/INT1/XOUT/RI/TI | bidirectional | General-purpose I/O with external interrupt 1 input with wake-up function, external crystal output, UART receive and UART transmit. |
| 4 | PT1.3/INT1/RST/VPP | input | Input-only pin with external interrupt 1 input with wake-up function, reset input (external hardware reset is enabled by the RESET_PIN code option, active low, Schmitt trigger) and programming voltage VPP. |
| 5 | PT1.4/INT1/PWM2/BZ2/T4/PDA | bidirectional | General-purpose I/O with external interrupt 1 input with wake-up function, PWM2 output, buzzer 2 output, timer/counter 4 external input, and OTP programming data line (PDA). |
| 6 | PT1.5/INT1/PWM3/BZ3/PCL | bidirectional | General-purpose I/O with external interrupt 1 input with wake-up function, PWM3 output, buzzer 3 output, and OTP programming clock line (PCL). |
| 7 | PT1.6/INT1/PWM4/BZ4 | bidirectional | General-purpose I/O with external interrupt 1 input with wake-up function, PWM4 output and buzzer 4 output. |
| 8 | PT1.7/INT1 | bidirectional | General-purpose I/O with external interrupt 1 input with wake-up function. |
| 9 | PT3.6/AIN6/PWM4/PWM3H | bidirectional | General-purpose I/O with open-drain output capability (pull-down enabled by default), ADC input 6, PWM4 output and PWM3H output. |
| 10 | PT3.5/AIN5/PWM3/PWM3L | bidirectional | General-purpose I/O with open-drain output capability, ADC input 5, PWM3 output and PWM3L output. |
| 11 | PT3.4/AIN4/RI/TI | bidirectional | General-purpose I/O (pull-down enabled by default), ADC input 4, UART receive and UART transmit. |
| 12 | PT3.3/AIN3/CO/RI/TI | bidirectional | General-purpose I/O, ADC input 3, comparator output, UART receive and UART transmit. |
| 13 | PT3.2/AIN2/C0N/VREF | bidirectional | General-purpose I/O, ADC input 2, comparator negative input and ADC reference voltage input. |
| 14 | PT3.1/AIN1/C0P/INT1/T3 | bidirectional | General-purpose I/O, ADC input 1, comparator positive input, external interrupt 1 input with wake-up function, and timer/counter 3 external input. |
| 15 | PT3.0/AIN0/VREF/INT0/T2 | bidirectional | General-purpose I/O with selectable input logic level (VTHP30), ADC input 0, ADC reference voltage input / internal reference voltage output, external interrupt 0 input with wake-up function, and timer/counter 2 external input. |
| 16 | VDD | power_in | Power supply pin. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | CHIPSEA |
| Package | SOP-16 |
| Category | Embedded Processors & Controllers |
| Pins | 16 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage VDD (absolute maximum) | VDD | -0.3 | | 6 | V | | 112 |
| Pin input voltage (absolute maximum) | | -0.3 | | | V | | 112 |
| Operating temperature | | -40 | | 85 | ºC | | 112 |
| Storage temperature | | -55 | | 150 | ºC | | 112 |
| Soldering temperature | | | | 220 | ºC | 10 s | 112 |
| Operating voltage VDD | VDD | 2.2 | 5 | 5.5 | V | 25 ºC | 112 |
| Operating voltage VDD | VDD | 2.3 | 5 | 5.5 | V | -40 ºC ~+85 ºC | 112 |
| Digital input high level PT3.0 | VIH3 | 0.7 | | | V | VTHP30=01 | 113 |
| Digital input low level PT3.0 | VIL3 | | | 0.7 | V | VTHP30=01 | 113 |
## CAD (KiCad official)
- Symbol: `CSU8RP3215-SOP16`
- Footprint: `Package_SO:SOIC-16_3.9x9.9mm_P1.27mm`
- 3D model: SOP-16 (KiCad packages3D, STEP)
- 3D model files: `csu8rp3215-sop16-etched.step` / `csu8rp3215-sop16-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `csu8rp3215-sop16.step` / `csu8rp3215-sop16.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [CHIPSEA datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590221879065161728) (132 pp, sha256 `c847063ee2c549e1`, retrieved 2026-10-18, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/csu8rp3215-sop16-datasheet.pdf)