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docs cse7759b: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers cse7759b: viewers · Ray
cse7759b-etched.fit.json cse7759b: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
cse7759b-etched.glb cse7759b: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
cse7759b-etched.step cse7759b: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
cse7759b.glb Publish 0.1.0 · Ray
cse7759b.kicad_mod Publish 0.1.0 · Ray
cse7759b.kicad_sym Publish 0.1.0 · Ray
cse7759b.lbr Publish 0.1.0 · Ray
cse7759b.step Publish 0.1.0 · Ray
package.json cse7759b: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray
page.json cse7759b: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray
README.md Initial commit: component/cse7759b · Ray

CSE7759B

CHIPSEA · Energy Metering · SOP-8

CSE7759B from CHIPSEA, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VDD power_in Chip power supply, recommended operating voltage 4.5-5.5 V.
2 V1P input Current differential signal positive input, maximum differential input signal ±43.75 mV; should be shorted to VSS when current signal is not used.
3 V1N input Current differential signal negative input, maximum differential input signal ±43.75 mV; should be shorted to VSS when current signal is not used.
4 V2P input Positive voltage signal input, maximum input signal ±700 mV; should be shorted to VSS when voltage signal is not used.
5 VSS power_in Chip ground.
6 TI output UART transmission port, serial data output at 4800 bps (±2%).
7 CF output Active high-frequency pulse output for active power metering, 50% duty cycle.
8 RI input UART reception port, reserved for future use.

Key specifications

Parameter Value
Manufacturer CHIPSEA
Package SOP-8
Category Data Acquisition
Pins 8

CAD (KiCad official)

  • Symbol: CSE7759B
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: cse7759b-etched.step / cse7759b-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cse7759b.step / cse7759b.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: CHIPSEA datasheet (17 pp, sha256 846fe22fe9357e8e, retrieved 2026-09-22, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF