component
CSD17302Q5A
Public Made by Adomby adom
Texas Instruments MOSFETs, DFN-8(4.9x5.7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownCSD17302Q5A
Texas Instruments · MOSFETs · DFN-8(4.9x5.7)
CSD17302Q5A from Texas Instruments, in a DFN-8(4.9x5.7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | D | passive | Drain of the 30V N-channel NexFET, rated for 87A continuous at TC = 25°C. |
| 2 | D | passive | Drain of the 30V N-channel NexFET, rated for 87A continuous at TC = 25°C. |
| 3 | D | passive | Drain of the 30V N-channel NexFET, rated for 87A continuous at TC = 25°C. |
| 4 | D | passive | Drain of the 30V N-channel NexFET, rated for 87A continuous at TC = 25°C. |
| 5 | G | input | Gate, with gate-to-source voltage rating of +10/-8 V and optimized for 5V gate drive. |
| 6 | S | passive | Source of the MOSFET. |
| 7 | S | passive | Source of the MOSFET. |
| 8 | S | passive | Source of the MOSFET. |
| 9 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | DFN-8(4.9x5.7) |
| Category | Transistors |
| Pins | 9 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain to Source Voltage | VDS | 30 | V | 1 | |||
| Gate to Source Voltage | VGS | -8 | 10 | V | 1 | ||
| Continuous Drain Current | ID | 87 | A | TC = 25°C | 1 | ||
| Continuous Drain Current | ID | 16 | A | 1 | |||
| Pulsed Drain Current | IDM | 104 | A | TA = 25°C, pulse duration ≤300ms, duty cycle ≤2% | 1 | ||
| Power Dissipation | PD | 3 | W | Footnote (1) | 1 | ||
| Operating Junction and Storage Temperature Range | TJ, TSTG | -55 | 150 | °C | 1 | ||
| Avalanche Energy, single pulse | EAS | 61 | mJ | ID = 35A, L = 0.1mH, RG = 25Ω | 1 | ||
| Drain to Source Voltage | BVDSS | 30 | V | VGS = 0V, ID = 250mA | 2 | ||
| Drain to Source Leakage Current | IDSS | 1 | mA | VGS = 0V, VDS = 24V | 2 | ||
| Gate to Source Leakage Current | IGSS | 100 | nA | VDS = 0V, VGS = +10 / -8V | 2 | ||
| Gate to Source Threshold Voltage | VGS(th) | 0.9 | 1.2 | 1.7 | V | VDS = VGS, ID = 250mA | 2 |
| Drain to Source On Resistance | RDS(on) | 9.5 | mΩ | VGS = 3V, ID = 14A | 2 | ||
| Drain to Source On Resistance | RDS(on) | 7.3 | 9 | mΩ | VGS = 4.5V, ID = 14A | 2 | |
| Drain to Source On Resistance | RDS(on) | 6.4 | 7.9 | mΩ | VGS = 8V, ID = 14A | 2 | |
| Input Capacitance | Ciss | 730 | 950 | pF | 2 | ||
| Output Capacitance | Coss | 390 | 510 | pF | VGS = 0V, VDS = 15V, f = 1MHz | 2 | |
| Reverse Transfer Capacitance | Crss | 35 | 45 | pF | 2 | ||
| Series Gate Resistance | RG | 0.8 | 1.6 | Ω | 2 | ||
| Gate Charge Total (4.5V) | Qg | 5.4 | 7 | nC | 2 | ||
| Diode Forward Voltage | VSD | 0.85 | 1 | V | ISD = 14A, VGS = 0V | 2 | |
| Thermal Resistance Junction to Case | RθJC | 1.8 | °C/W | Footnote (1) | 2 | ||
| Thermal Resistance Junction to Ambient | RθJA | 51 | °C/W | Footnotes (1)(2) | 2 |
CAD (KiCad official)
- Symbol:
CSD17302Q5A - Footprint:
Package_DFN_QFN:DFN-S-8-1EP_6x5mm_P1.27mm - 3D model: DFN-8(4.9x5.7) (KiCad packages3D, STEP)
- 3D model files:
csd17302q5a-etched.step/csd17302q5a-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);csd17302q5a.step/csd17302q5a.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (10 pp, sha256
a10d642277e6d56a, retrieved 2026-11-10, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).