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CSA231LATSSOP8

Public Made by Adom

by adom

analogysemi Current Sense Amplifiers, TSSOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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CSA231LATSSOP8

analogysemi · Current Sense Amplifiers · TSSOP-8

CSA231LATSSOP8 from analogysemi, in a TSSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 NC unconnected Do not connect; this pin must be left unconnected.
2 RS+ input External resistor power-side (high-side) sense connection, with VRS+ to GND specified from 0 V to 76 V and VRS+ - VRS- limited to -1 V to +1 V.
3 RS- input External resistor load-side sense connection, with VRS- to GND specified from 0 V to 76 V.
4 GND power_in Power ground.
5 VDD power_in Supply voltage from 2.7 V to 5.5 V, with at least a 100 nF capacitor connected to GND.
6 REF2 input Reference voltage input 2, typically connected to GND, with the reference input range specified as GND to VDD.
7 REF1 input Reference voltage input 1, typically connected to VDD, with the reference input range specified as GND to VDD.
8 OUT output Output, which sits at one-half of (REF1 + REF2).

Key specifications

Parameter Value
Manufacturer analogysemi
Package TSSOP-8
Category Amplifiers/Comparators
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply Voltage VDD 2.7 5.5 V Guaranteed by PSRR 6
Supply Current IDD 560 800 µA TA = 25°C 6
Supply Current IDD 850 µA -40°C < TA < 125°C 6
Power-Supply Rejection Ratio PSRR 105 108 dB 2.7V ≤ VDD ≤ 5.5V 6
Input Common-Mode Voltage Range VCM 0 76 V Guaranteed by CMRR 6
Common-Mode Rejection Ratio CMRR 130 159 dB 0V < VRS+ < 76V 6
Input Offset Voltage VOS -60 8 60 µV TA = 25°C 6
Input Offset Voltage VOS -150 50 150 µV -40°C ≤ TA ≤ 125°C 6
Input Bias Current at VRS+ and VRS- IRS+, IRS- 0.003 0.1 µA 6
Input Offset Current IRS+, IRS- 0.2 µA 6
Input Leakage Current IRS+, IRS- 0.2 µA VDD = 0V, VRS+ = VRS- = 76V 6
Input Offset Voltage Drift TCVOS 160 nV/°C 6
Gain Error GE 0.02 0.1 % TA = 25°C 6
Gain Error GE 0.25 % -40°C ≤ TA ≤ 85°C 6
Gain Error GE 0.3 % -40°C ≤ TA ≤ 125°C 6
VREF Resistor Match 0.1 % 6
Reference Voltage Rejection Ratio (Input-Referred) RVRR 10 µV/V 6
Output Low Voltage VOL 15 mV Sink 500µA 6
Output Low Voltage VOL 4 mV No load 6
Capacitive Load Stability CLOAD 20 nF With 250Ω isolation resistor 6
Capacitive Load Stability CLOAD 500 pF Without any isolation resistor 6
Power-Up Time 80 µs 6
Power Supply VDD to GND (recommended) VDD 2.7 3.3 5.5 V 5
VRS+ and VRS- To GND VRS+, VRS- 0 76 V To GND 5
VRS+, VRS- VRS+, VRS- -1 1 V 5
Operating Ambient Temperature TA -40 125 °C 5
VDD to GND VDD -0.3 6 V 4
RS+, RS- to GND VRS+, VRS- -0.3 80 V 4
REF1, REF2 to GND (printed max: VDD + 0.3) VREF1, VREF2 -0.3 V 4
RS+ to RS- VRS+, VRS- -80 80 V 1s maximum duration due to package thermal dissipation 4
Continuous input current (any pin) II -20 20 mA 4
Operating temperature, TA TA -40 125 °C 4
Junction temperature, TJ TJ 150 °C 4
Storage temperature, Tstg Tstg -65 150 °C 4
Lead soldering 300 °C 10s 4
Soldering (reflow) 260 °C 4
Electrostatic Discharge, Human-body model V(ESD) -6000 6000 V Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 4
Electrostatic Discharge, Charged-device model V(ESD) -1500 1500 V Charged-device model (CDM), per JEDEC JESD22-C101 4
Gain (CSA231-10) G 10 V/V 6
VREF Resistor RREF 22.6 kΩ 6
VREF Resistor Temperature Drift TCRREF 180 Ω/°C 6
Signal Bandwidth BW 90 kHz -3dB, all gain configurations, VSENSE > 5mV 6
Slew Rate SR 0.4 V/µs 6
AC Power-Supply Rejection Ratio AC PSRR 47 dB f = 200kHz 6
AC Common-Mode Rejection Ratio AC CMRR 90 dB f = 200kHz 6
Input Voltage-Noise Density en 70 nV/√Hz f = 1kHz 6
Saturation Recovery Time 5 µs 6
Junction-to-Ambient Thermal Resistance (TSSOP-8) RθJA 187 °C/W 5
Junction-to-Board Thermal Resistance (TSSOP-8) RθJB 120 °C/W 5
Junction-to-Top Characterization Parameter (TSSOP-8) ψJT 1 °C/W 5
Junction-to-Board Characterization Parameter (TSSOP-8) ψJB 118 °C/W 5
Junction-to-Case (Top) Thermal Resistance (TSSOP-8) RθJC(top) 46 °C/W 5
Junction-to-Case (Bottom) Thermal Resistance (TSSOP-8) RθJC(bot) 82 °C/W 5

CAD (KiCad official)

  • Symbol: CSA231LATSSOP8
  • Footprint: Package_SO:TSSOP-8_3x3mm_P0.65mm
  • 3D model: TSSOP-8 (KiCad packages3D, STEP)
  • 3D model files: csa231latssop8-etched.step / csa231latssop8-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); csa231latssop8.step / csa231latssop8.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: analogysemi datasheet (18 pp, sha256 b25417d92b02a132, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF