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CS817x22LS

Public Made by Adom

by adom

Chipanalog Digital Isolators, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentsignal isolation devicescs817x22lsfactory-2.0.0extractor-text
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3D Model

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Symbol & Footprint

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Datasheet

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Contents

README

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CS817x22LS

Chipanalog · Digital Isolators · SOIC-8

CS817x22LS from Chipanalog, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VDD1 power_in Power supply for side 1, referenced to GND1, operating from 2.375 V to 5.5 V.
2 OUTA bidirectional Digital output A on side 2/1, the logic output for the INA input on side 1/2.
3 INB bidirectional Digital input B on side 1, corresponds to logic output B on side 2.
4 GND1 power_in Ground reference for side 1.
5 GND2 power_in Ground reference for side 2.
6 OUTB bidirectional Digital output B on side 2, the logic output for the INB input on side 1.
7 INA bidirectional Digital input A on side 1/2, corresponds to logic output A on side 2/1.
8 VDD2 power_in Power supply for side 2, referenced to GND2, operating from 2.375 V to 5.5 V.

Key specifications

Parameter Value
Manufacturer Chipanalog
Package SOIC-8
Category Signal Isolation Devices
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Power supply voltage VDD1, VDD2 -0.5 6 V 5
Output current IO -20 20 mA 5
Junction temperature TJ 150 °C 5
Storage temperature range TSTG -65 150 °C 5
Voltage at INX, OUTX Vin -0.5 V Max printed as VDDI+0.5; VDDI must not exceed 6 V 5
Supply voltage side 1 and 2 VDD1, VDD2 2.375 5.5 V Side 1 and 2; typ printed as 3.3/5.0 5
Data rate DR 0 200 kbps 5
Ambient temperature TA -40 25 125 °C 5
High-level output current 5V IOH 4 mA VDDO1 = 5V 5
High-level output current 3.3V IOH 2 mA VDDO = 3.3V 5
High-level output current 2.5V IOH 1 mA VDDO = 2.5V 5
Low-level output current 5V IOL -4 mA VDDO = 5V 5
Low-level output current 3.3V IOL -2 mA VDDO = 3.3V 5
Low-level output current 2.5V IOL -1 mA VDDO = 2.5V 5
Junction-to-ambient thermal resistance RθJA 110.1 °C/W SOIC8-NB(S) 5
Maximum power dissipation PD 5 mW VDD1 = VDD2 = 5.5 V, CL = 15 pF, TJ = 150°C, 100kHz 50% duty cycle square wave 5
Maximum power dissipation side 1 PD1 2.5 mW Same as PD, CS817x22HS/LS 5
Maximum power dissipation side 2 PD2 2.5 mW Same as PD, CS817x22HS/LS 5
Human body model ESD VESD -5000 5000 V HBM, all pins 5
Charged device model ESD VESD -2000 2000 V CDM, all pins 5
High-level output voltage 5V VOH 4.7 V IOH = -4mA; min printed as VDDO1-0.4; VDD1 = VDD2 = 5 V ± 10%, TA = -40 to 105°C 7
Low-level output voltage 5V VOL 0.3 0.4 V IOL = 4mA; VDD1 = VDD2 = 5 V ± 10% 7
Common-mode transient immunity 5V CMTI 100 150 kV/µs VI = VDDI1 or 0 V, VCM = 1500 V; VDD 5 V 7
Input capacitance 5V CI 2 pF VI = VDD/2 + 0.4×sin(2πft), f = 100kHz, VDD = 5 V 7
High-level input leakage current IIH 1 µA VIH = VDDI at INx 7
Low-level input leakage current IIL -1 µA VIL = 0 V at INx 7
High-level output voltage 3.3V VOH 3 V IOH = -4mA; min printed as VDDO1-0.4; VDD1 = VDD2 = 3.3 V ± 10% 7
Low-level output voltage 3.3V VOL 0.3 0.4 V IOL = 4mA; VDD1 = VDD2 = 3.3 V ± 10% 7
Common-mode transient immunity 3.3V CMTI 100 150 kV/µs VI = VDDI1 or 0 V, VCM = 1500 V; VDD 3.3 V 7
Input capacitance 3.3V CI 2 pF VI = VDD/2 + 0.4×sin(2πft), f = 100kHz, VDD = 3.3V 7
High-level output voltage 2.5V VOH 2.2 V IOH = -4mA; min printed as VDDO1-0.5; VDD1 = VDD2 = 2.5 V ± 10% 7
Low-level output voltage 2.5V VOL 0.2 0.4 V IOL = 4mA; VDD1 = VDD2 = 2.5 V ± 10% 7
Common-mode transient immunity 2.5V CMTI 100 150 kV/µs VI = VDDI1 or 0 V, VCM = 1500 V; VDD 2.5 V 7
Input capacitance 2.5V CI 2 pF VI = VDD/2 + 0.4×sin(2πft), f = 100kHz, VDD = 2.5V 7
Supply current side 1 DC, 5V IDD1 100 200 µA VDD 5V, VIN = 0V (CS817x22LS) 8
Supply current side 2 DC, 5V IDD2 105 210 µA VDD 5V, VIN = 0V (CS817x22LS) 8
Supply current side 1 at 10kbps, 5V IDD1 105 210 µA VDD 5V, 10kbps (5kHz), CL = 15 pF 8
Supply current side 2 at 10kbps, 5V IDD2 110 220 µA VDD 5V, 10kbps (5kHz), CL = 15 pF 8
Supply current side 1 at 200kbps, 5V IDD1 215 430 µA VDD 5V, 200kbps (100kHz), CL = 15 pF 8
Supply current side 2 at 200kbps, 5V IDD2 220 440 µA VDD 5V, 200kbps (100kHz), CL = 15 pF 8
Supply current side 1 DC, 3.3V IDD1 90 180 µA VDD 3.3V, VIN = 0V (CS817x22LS) 8
Supply current side 2 DC, 3.3V IDD2 95 190 µA VDD 3.3V, VIN = 0V (CS817x22LS) 8
Supply current side 1 at 10kbps, 3.3V IDD1 95 190 µA VDD 3.3V, 10kbps (5kHz), CL = 15 pF 8
Supply current side 2 at 10kbps, 3.3V IDD2 100 200 µA VDD 3.3V, 10kbps (5kHz), CL = 15 pF 8
Supply current side 1 at 200kbps, 3.3V IDD1 160 320 µA VDD 3.3V, 200kbps (100kHz), CL = 15 pF 8
Supply current side 2 at 200kbps, 3.3V IDD2 165 330 µA VDD 3.3V, 200kbps (100kHz), CL = 15 pF 8
Supply current side 1 DC, 2.5V IDD1 90 180 µA VDD 2.5V, VIN = 0V (CS817x22LS) 9
Supply current side 2 DC, 2.5V IDD2 95 190 µA VDD 2.5V, VIN = 0V (CS817x22LS) 9
Supply current side 1 at 10kbps, 2.5V IDD1 90 180 µA VDD 2.5V, 10kbps (5kHz), CL = 15 pF 9
Supply current side 2 at 10kbps, 2.5V IDD2 95 190 µA VDD 2.5V, 10kbps (5kHz), CL = 15 pF 9
Supply current side 1 at 200kbps, 2.5V IDD1 145 290 µA VDD 2.5V, 200kbps (100kHz), CL = 15 pF 9
Supply current side 2 at 200kbps, 2.5V IDD2 150 300 µA VDD 2.5V, 200kbps (100kHz), CL = 15 pF 9
Data rate DR 0 200 kbps VDD1 = VDD2 = 2.5V~5.5V 9
Minimum pulse width PWmin 5 µs VDD1 = VDD2 = 2.5V~5.5V 9
Propagation delay time tPLH, tPHL 1.1 2 µs VDD1 = VDD2 = 2.5V~5.5V 9
Pulse width distortion PWD 100 ns /tPLH - tPHL/ 9
Channel-to-channel output skew tsk(o) 100 ns Same-direction channels 9
Part-to-part output skew tsk(pp) 300 ns 9
Output signal rise time tr 2.8 5 ns 9
Output signal fall time tf 2.8 5 ns 9
Default output delay time from input power loss tDO 400 600 µs 9
Start-up time tSU 50 µs 9
Refresh rate FR 20 kbps 9

CAD (KiCad official)

  • Symbol: CS817x22LS
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: cs817x22ls-etched.step / cs817x22ls-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cs817x22ls.step / cs817x22ls.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Chipanalog datasheet (20 pp, sha256 370cfd8ae67fb372, retrieved 2026-10-26, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF