component

CS60-16IO1

Public Made by Adom

by adom

IXYS TRIACs, TO-247-3. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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CS60-16IO1

IXYS · TRIACs · TO-247-3

CS60-16IO1 from IXYS, in a TO-247-3. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 K passive Cathode terminal of the thyristor (symbol pin 1), rated 70 A RMS per terminal.
2 A passive Anode terminal of the thyristor (symbol pin 2), connected to the package backside (backside: anode) and rated 70 A RMS per terminal.
3 G input Gate terminal; trigger needs VGT 1.5 V and IGT 100 mA at 25°C (1.6 V and 200 mA at -40°C), with a max gate power dissipation PGM of 10 W for 30 µs.

Key specifications

Parameter Value
Manufacturer IXYS
Package TO-247-3
Category Transistors
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Max. non-repetitive reverse/forward blocking voltage VRSM/VDSM 1700 V TVJ = 25°C 2
Max. repetitive reverse/forward blocking voltage VRRM/VDRM 1600 V TVJ = 25°C to 140°C 2
Reverse current, drain current IR/ID 200 µA VR/D = VRRM/VDRM; TVJ = 25°C 2
Reverse current, drain current IR/ID 10 mA VR/D = VRRM/VDRM; TVJ = 140°C 2
Forward voltage drop VT 1.18 V IT = 60 A; TVJ = 25°C 2
Forward voltage drop VT 1.14 V IT = 60 A; TVJ = 140°C 2
RMS forward current IT(RMS) 75 A 2
Average forward current ITAV 60 A TC = 110°C; 180° sine 2
Threshold voltage VT0 0.82 V TVJ = 140°C 2
Slope resistance rT 5.3 mΩ TVJ = 140°C 2
Total power dissipation Ptot 360 W TC = 25°C 2
Max. gate power dissipation PGM 10 W tP = 30 µs; TC = 140°C 2
Max. gate power dissipation PGM 5 W tP = 300 µs; TC = 140°C 2
Average gate power dissipation PGAV 0.5 W 2
Critical rate of rise of current (repetitive) (di/dt)cr 150 A/µs TVJ = 140°C; f = 50 Hz; repetitive 2
Critical rate of rise of current (non-repetitive) (di/dt)cr 500 A/µs non-repet. 2
Critical rate of rise of voltage (dv/dt)cr 1000 V/µs VD = ⅔ VDRM; TVJ = 140°C; RGK = ∞; method 1 (linear voltage rise) 2
Gate trigger voltage VGT 1.5 V VD = 6 V; TVJ = 25°C 2
Gate trigger voltage VGT 1.6 V VD = 6 V; TVJ = -40°C 2
Gate trigger current IGT 100 mA VD = 6 V; TVJ = 25°C 2
Gate trigger current IGT 200 mA VD = 6 V; TVJ = -40°C 2
Gate non-trigger voltage VGD 0.2 V VD = ⅔ VDRM; TVJ = 140°C 2
Gate non-trigger current IGD 10 mA VD = ⅔ VDRM; TVJ = 140°C 2
Latching current IL 450 mA tp = 10 µs; TVJ = 25°C 2
Holding current IH 200 mA VD = 6 V; RGK = ∞; TVJ = 25°C 2
Gate controlled delay time tgd 2 µs TVJ = 25°C; VD = ½ VDRM 2
Turn-off time tq 150 µs 2
Thermal resistance junction to case RthJC 0.32 K/W 2
Thermal resistance case to heatsink RthCH 0.15 K/W 2
Junction capacitance CJ 74 pF VR = 400 V; f = 1 MHz; TVJ = 25°C 2
Virtual junction temperature TVJ -40 140 °C 3
Operation temperature Top -40 125 °C 3
Storage temperature Tstg -40 140 °C 3
RMS current per terminal IRMS 70 A 3
Mounting force with clip FC 20 120 N 3
Weight 6 g 3

CAD (KiCad official)

  • Symbol: CS60-16IO1
  • Footprint: Package_TO_SOT_THT:TO-247-3_Vertical
  • 3D model: TO-247-3 (KiCad packages3D, STEP)
  • 3D model files: cs60-16io1-etched.step / cs60-16io1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cs60-16io1.step / cs60-16io1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: IXYS datasheet (5 pp, sha256 50d015eb81775c27, retrieved 2026-10-23, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF