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Contents

README

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CS5460A-BSZ

Cirrus Logic · Energy Metering · SSOP-24-208mil

CS5460A-BSZ from Cirrus Logic, in a SSOP-24-208mil. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 XOUT output Crystal oscillator output; leave unconnected when using external clock source on XIN.
2 CPUCLK output CPU clock output capable of driving one standard CMOS load.
3 VD+ power_in Positive digital supply input, nominally +5 V ±10% relative to DGND.
4 DGND power_in Digital ground reference, must equal or exceed VA- common-mode potential.
5 SCLK input Serial clock input with Schmitt trigger determining serial data transfer rate.
6 SDO tri_state Serial data output with high impedance when CS high, capable of sourcing/sinking 5 mA.
7 CS input Chip select input; low enables serial port access to SCLK, SDI, and SDO pins.
8 MODE input Mode select input; high enables auto-boot from external EEPROM, internally pulled low if unconnected.
9 VIN+ power_in Positive differential voltage input for voltage channel, maximum ±250 mV full-scale range.
10 VIN- power_in Negative differential voltage input for voltage channel, maximum ±250 mV full-scale range.
11 VREFOUT output On-chip 2.5 V voltage reference output, can connect to VREFIN or use external reference instead.
12 VREFIN input Reference voltage input establishing the ADC modulator reference, typical +2.5 V.
13 VA- power_in Negative analog supply/ground reference for analog measurements, must be at lowest potential.
14 VA+ power_in Positive analog supply input, nominally +5 V ±10% relative to VA-.
15 IIN- input Negative differential current input for current channel, maximum ±250 mV (10x gain) or ±50 mV (50x gain).
16 IIN+ input Positive differential current input for current channel, measures voltage across shunt or burden resistor.
17 PFMON input Power fail monitor input tracking analog supply voltage, asserts LSD at ~2.45 V threshold.
18 NC unconnected No connection; pin should be left floating.
19 RESET input Reset input with Schmitt trigger, forces all internal registers to default values when held low.
20 INT output Interrupt output signal active low by default, asserted when enabled status register events occur.
21 EOUT output Energy output active-low pulse train with programmable frequency proportional to real energy.
22 EDIR output Energy direction indicator output, asserts when accumulated energy is negative.
23 SDI input Serial data input receiving command and register data bits at rate determined by SCLK.
24 XIN input Crystal oscillator input or external CMOS-compatible clock source, supports 2.5 to 20 MHz.

Key specifications

Parameter Value
Manufacturer Cirrus Logic
Package SSOP-24-208mil
Category Data Acquisition
Pins 24

CAD (KiCad official)

  • Symbol: CS5460A-BSZ
  • Footprint: Package_SO:SSOP-24_5.3x8.2mm_P0.65mm
  • 3D model: SSOP-24-208mil (KiCad packages3D, STEP)
  • 3D model files: cs5460a-bsz-etched.step / cs5460a-bsz-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cs5460a-bsz.step / cs5460a-bsz.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Cirrus Logic datasheet (54 pp, sha256 4f33d3eb7c8ca8e9, retrieved 2026-09-21, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF