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Contents

README

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CS48520AM

Chipanalog · IC · MSOP-8

CS48520AM from Chipanalog, in a MSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 RO output Receiver data output: goes high when VID is above VTH+ and low when VID is below VTH-, and goes high-impedance when REB is high or open.
2 REB input Receiver enable, active low, with an internal pull-up; the receiver is disabled (RO high-impedance) when REB is high or open.
3 DE input Driver enable, active high, with an internal pull-down; A and B are high-impedance when DE is low or open.
4 DI input Driver data input with an internal pull-up to VCC; when the driver is enabled and DI is open, A is driven high and B low.
5 GND power_in Ground reference for all device voltages.
6 A bidirectional Non-inverting bus input/output; bus voltage limited to -8 V to 13 V (absolute maximum) with ±20 kV HBM and ±6 kV IEC 61000-4-2 contact ESD protection.
7 B bidirectional Inverting bus input/output; bus voltage limited to -8 V to 13 V (absolute maximum) with ±20 kV HBM and ±6 kV IEC 61000-4-2 contact ESD protection.
8 VCC power_in Supply pin, 3.0 V to 5.5 V recommended, with a 100 nF to 220 nF decoupling capacitor to be placed as close to the pin as possible.

Key specifications

Parameter Value
Manufacturer Chipanalog
Package MSOP-8
Category
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC -0.5 7 V 5
Bus voltage (A, B) VIO -8 13 V Bus pins A, B 5
Differential voltage between bus pins A and B VIO_DIF -8 13 V 5
Logic input voltage (DI, DE, REB) VIO -0.3 V DI, DE, REB 5
Logic output voltage (RO) VIO -0.3 V RO 5
Junction temperature (absolute maximum) TJ 150 °C 5
Storage temperature TSTG -65 150 °C 5
Supply voltage, referenced to GND VCC 3 5 5.5 V 5
Bus input voltage VIN -7 12 V 5
High-level input threshold VIH 2 V 5
Low-level input threshold VIL 0 0.8 V 5
Differential load resistance RL 54 Ω 5
Data rate, CS48520Ax 1/tUI 20 Mbps CS48520Ax 5
Operating ambient temperature TA -40 125 °C 5
Operating junction temperature TJ -40 150 °C 5
Differential output voltage /VOD/ 1.5 3.6 V RL = 60Ω,-7V ≤ Vtest ≤ 12V,见图 8-1 6
Differential output voltage (VCC 4.5 V to 5.5 V) /VOD/ 2.1 3.6 V RL = 60Ω,-7V ≤ Vtest ≤ 12V,4.5V ≤ VCC ≤ 5.5V,见图 8-1 6
Differential output voltage /VOD/ 2 4.2 V RL = 100Ω,CL = 50pF,见图 8-2 6
Differential output voltage change Δ/VOD/ -50 50 mV RL = 54Ω 或 100Ω,CL = 50pF,见图 8-2 6
Common-mode output voltage VOC 1 3 V RL = 54Ω 或 100Ω,CL = 50pF,见图 8-2 6
Steady-state common-mode output voltage change ΔVOC(SS) -50 50 mV 6
Common-mode output voltage change, peak-to-peak VOC(PP) 450 mV 6
Driver short-circuit output current /IOS/ 100 150 mA DE = VCC,-7V ≤ VO ≤ 12V,或 A 和 B 短接 6
Bus input current II 75 125 μA DE = 0V,VCC = 0V 或 5.5V,VI = 12V 6
Bus input current II -100 -40 μA DE = 0V,VCC = 0V 或 5.5V,VI = -7V 6
Bus input impedance RI 96 kΩ VA = -7V,VB = 12V 或 VA = 12V,VB = -7V 6
Positive-going input threshold voltage VTH+ -110 -50 mV 6
Negative-going input threshold voltage VTH- -200 -140 mV 6
Input hysteresis voltage VHYS 30 mV 6
Output low voltage VOL 0.2 0.4 V IOL = 4mA 6
High-impedance output current IOZR -1 1 μA REB = VCC,VO = 0V 或 VCC 6
Receiver short-circuit output current IOSR 95 mA REB = DE = 0V,见图 8-3 6
Input current (DI, DE, REB) IIN -5 5 μA 0V ≤ VIN ≤ VCC 6
Quiescent supply current, driver and receiver enabled ICC 900 1400 μA Driver and receiver enabled, REB = 0V,DE = VCC,no load 6
Quiescent supply current, driver enabled, receiver disabled ICC 550 900 μA REB = VCC,DE = VCC,no load 6
Quiescent supply current, driver disabled, receiver enabled ICC 500 800 μA REB = 0V,DE = 0V,no load 6
Quiescent supply current, driver and receiver disabled ICC 5 μA REB = VCC,DE = 0V,DI = VCC,no load 6
Driver differential rise/fall time tr, tf 5 12 ns RL = 54Ω,CL = 50pF,见图 8-4 7
Driver propagation delay tPHL, tPLH 12 25 ns 7
Driver pulse width distortion tSK(P) 3.5 ns /tPHL, tPLH/ 7
Driver disable time tPHZ, tPLZ 10 30 ns 见图 8-5 和图 8-6 7
Driver enable time tPZH, tPZL 300 800 ns REB = 0V,见图 8-5 和图 8-6 7
Driver enable time tPZH, tPZL 6 12 μs REB = VCC,见图 8-5 和图 8-6 7
Receiver output rise/fall time tr, tf 4 8 ns CL = 15pF,见图 8-7 7
Receiver propagation delay tPHL, tPLH 40 80 ns 7
Receiver pulse width distortion tSK(P) 12 ns /tPHL, tPLH/ 7
Receiver disable time tPHZ, tPLZ 7 20 ns 见图 8-8 7
Receiver enable time tPZH(1), tPZL(1), tPZH(2), tPZL(2) 30 70 ns DE = VCC,见图 8-8 和图 8-9 7
Receiver enable time tPZH(1), tPZL(1), tPZH(2), tPZL(2) 6 12 μs DE = 0V,见图 8-8 和图 8-9 7
Thermal shutdown temperature TSD 170 °C 6
Thermal shutdown hysteresis TSD 20 °C 6
Junction-to-ambient thermal resistance, MSOP8 column RθJA 160 °C/W Chip junction to ambient, MSOP8 column 5

CAD (KiCad official)

  • Symbol: CS48520AM
  • Footprint: Package_SO:MSOP-8_3x3mm_P0.65mm
  • 3D model: MSOP-8 (KiCad packages3D, STEP)
  • 3D model files: cs48520am-etched.step / cs48520am-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cs48520am.step / cs48520am.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Chipanalog datasheet (22 pp, sha256 4cc3e4a98400ee1a, retrieved 2026-10-31, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF