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CS48505AM

Public Made by Adom

by adom

Chipanalog , MSOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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CS48505AM

Chipanalog · IC · MSOP-8

CS48505AM from Chipanalog, in a MSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 RO output Receiver data output; it is high-impedance when REB is high or open, and it is held at fail-safe high when the bus is open, shorted, or idle.
2 REB input Active-low receiver enable with an internal resistor pull-up; the receiver is enabled only when REB is logic low, and the output is high-impedance when REB is high or open.
3 DE input Active-high driver enable with an internal pull-down; A and B are high-impedance when DE is low or open, and the input logic high threshold is 2.0 V minimum with a low threshold of 0.8 V maximum.
4 DI input Driver data input with an internal pull-up to VCC; A goes high and B goes low when DI is high, and the input logic thresholds are 2.0 V minimum (high) and 0.8 V maximum (low).
5 GND power_in Ground reference for the device; all voltages are referenced to GND.
6 A bidirectional Non-inverting RS-485 bus input/output; bus voltage must stay within -7 V to 12 V in operation, with an absolute maximum range of -8 V to 13 V.
7 B bidirectional Inverting RS-485 bus input/output; bus voltage must stay within -7 V to 12 V in operation, with an absolute maximum range of -8 V to 13 V.
8 VCC power_in Supply pin rated 3.0 V to 5.5 V (absolute maximum 7 V); a 100 nF to 220 nF decoupling capacitor should be placed as close as possible to this pin.

Key specifications

Parameter Value
Manufacturer Chipanalog
Package MSOP-8
Category
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Differential output voltage (RL=60Ω, -7V≤Vtest≤12V) /VOD/ 1.5 3.6 V RL = 60Ω, -7V ≤ Vtest ≤ 12V, 见图 8-1 6
Differential output voltage (RL=60Ω, 4.5V≤VCC≤5.5V) /VOD/ 2.1 3.6 V RL = 60Ω，-7V ≤ Vtest ≤ 12V，4.5V ≤ VCC ≤ 5.5V，见图 8-1 6
Differential output voltage (RL=100Ω) /VOD/ 2 4.2 V RL = 100Ω，CL = 50pF，见图 8-2 6
Differential output voltage (RL=54Ω) /VOD/ 1.5 3.6 V RL = 54Ω，CL = 50pF，见图 8-2 6
Change in differential output voltage Δ/VOD/ -50 50 mV RL = 54Ω 或 100Ω，CL = 50pF，见图 8-2 6
Common-mode output voltage VOC 1 3 V RL = 54Ω 或 100Ω，CL = 50pF，见图 8-2 6
Steady-state common-mode output voltage change ΔVOC(SS) -50 50 mV 6
Common-mode output voltage peak-to-peak change VOC(PP) 450 mV 6
Driver short-circuit output current /IOS/ 100 150 mA DE = VCC，-7V ≤ VO ≤ 12V，或 A 和 B 短接 6
Bus input current (VI=12V) II 75 125 μA DE = 0V，VCC = 0V 或 5.5V，VI = 12V 6
Bus input current (VI=-7V) II -100 -40 μA DE = 0V，VCC = 0V 或 5.5V，VI = -7V 6
Bus input impedance RI 96 kΩ VA = -7V，VB = 12V 或 VA = 12V，VB = -7V (see note 1) 6
Positive input threshold voltage VTH+ -110 -50 mV 6
Negative input threshold voltage VTH- -200 -140 mV 6
Input hysteresis voltage VHYS 30 mV 6
Output low voltage VOL 0.2 0.4 V IOL = 4mA 6
High-impedance output current IOZR -1 1 μA REB = VCC，VO = 0V 或 VCC 6
Receiver short-circuit output current IOSR 95 mA REB = DE = 0V，见图 8-3 6
Input current (DI, DE, REB) IIN -5 5 μA 0V ≤ VIN ≤ VCC 6
Quiescent supply current (driver and receiver enabled) ICC 900 1400 μA 驱动器和接收机使能，REB = 0V，DE = VCC，空载 6
Quiescent supply current (driver enabled, receiver disabled) ICC 550 900 μA 驱动器使能，接收机关闭，REB = VCC，DE = VCC，空载 6
Quiescent supply current (driver disabled, receiver enabled) ICC 500 800 μA 驱动器关闭，接收机使能，REB = 0V，DE = 0V，空载 6
Standby supply current (driver and receiver disabled) ICC 5 μA 驱动器关闭，接收机关闭，REB = VCC，DE = 0V，DI = VCC，空载 6
Driver differential output rise/fall time tr, tf 150 500 ns RL = 54Ω，CL = 50pF，见图 8-4 (CS48505Ax) 7
Driver propagation delay tPHL, tPLH 100 250 ns (CS48505Ax) 7
Driver pulse width distortion tSK(P) 10 ns /tPHL, tPLH/ (CS48505Ax) 7
Driver disable time tPHZ, tPLZ 10 30 ns 见图 8-5 和图 8-6 (CS48505Ax) 7
Driver enable time (REB=0V) tPZH, tPZL 300 800 ns REB = 0V，见图 8-5 和图 8-6 (CS48505Ax) 7
Driver enable time (REB=VCC) tPZH, tPZL 6 12 μs REB = VCC，见图 8-5 和图 8-6 (CS48505Ax) 7
Receiver output rise/fall time tr, tf 10 20 ns CL = 15pF，见图 8-7 (CS48505Ax) 7
Receiver propagation delay tPHL, tPLH 50 100 ns (CS48505Ax) 7
Receiver pulse width distortion tSK(P) 7 ns /tPHL, tPLH/ (CS48505Ax) 7
Receiver disable time tPHZ, tPLZ 30 60 ns 见图 8-8 (CS48505Ax) 7
Receiver enable time (DE=VCC) tPZH(1), tPZL(1), tPZH(2), tPZL(2) 50 100 ns DE = VCC，见图 8-8 和图 8-9 (CS48505Ax) 7
Receiver enable time (DE=0V) tPZH(1), tPZL(1), tPZH(2), tPZL(2) 6 12 μs DE = 0V，见图 8-8 和图 8-9 (CS48505Ax) 7
Supply voltage VCC VCC 3 5 5.5 V 参照 GND 5
Bus input voltage VIN -7 12 V 5
High-level input threshold voltage VIH 2 V 5
Low-level input threshold voltage VIL 0 0.8 V 5
Differential load resistance RL 54 Ω 5
Data rate CS48505Ax 1/tUI 0.5 Mbps CS48505Ax 5
Operating ambient temperature TA -40 125 °C 5
Operating junction temperature TJ -40 150 °C 5
Supply voltage VCC (absolute) VCC -0.5 7 V 参照 GND，峰值 5
Bus voltage A, B VIO -8 13 V 总线 A，B 5
Bus voltage difference between A and B VIO_DIF -8 13 V 总线 A 和 B 之间的电压差 5
Logic input voltage (DI, DE, REB) VIO -0.3 V DI，DE，REB; upper limit printed as VCC + 0.33 5
Logic output voltage (RO) VIO -0.3 V RO; upper limit printed as VCC + 0.33 5
Junction temperature (absolute) TJ 150 °C 结温 5
Storage temperature TSTG -65 150 °C 5
Thermal resistance junction-to-ambient (MSOP8) RθJA 160 °C/W 芯片结到环境的热阻, MSOP8 column 5
Thermal shutdown temperature TSD 170 °C 6
Thermal shutdown hysteresis TSD hysteresis 20 °C 6

CAD (KiCad official)

  • Symbol: CS48505AM
  • Footprint: Package_SO:MSOP-8_3x3mm_P0.65mm
  • 3D model: MSOP-8 (KiCad packages3D, STEP)
  • 3D model files: cs48505am-etched.step / cs48505am-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cs48505am.step / cs48505am.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Chipanalog datasheet (22 pp, sha256 4cc3e4a98400ee1a, retrieved 2026-10-20, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF