component
CS4350-CZZR
Public Made by Adomby adom
Cirrus Logic Digital To Analog Converters (DACs), TSSOP-24. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
"slug": "cs4350-czzr",
"version": "0.1.0",
"type": "component",
"description": "Cirrus Logic Digital To Analog Converters (DACs), TSSOP-24. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"tags": [
"component",
"adc-dac-data conversion",
"cs4350-czzr",
"factory-2.0.0",
"extractor-text"
],
"dependencies": {},
"hero": {
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"path": "docs/hero.png"
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"files": [
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"cs4350-czzr.step",
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"docs/cs4350-czzr-datasheet.pdf",
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"viewers/footprint.html",
"cs4350-czzr-hero.glb",
"cs4350-czzr-hero.overlay.json",
"cs4350-czzr-etched.glb"
],
"component": {
"mpn": "CS4350-CZZR",
"manufacturer": "Cirrus Logic",
"package": "TSSOP-24",
"pin_count": 24,
"category": "ADC/DAC/Data Conversion",
"subcategory": "Digital To Analog Converters (DACs)",
"datasheet": "https://datasheet.lcsc.com/datasheet/pdf/590149d774f20e465ba408700dcf9e1f.pdf",
"parts": {
"symbol": "cs4350-czzr.kicad_sym",
"footprint": "cs4350-czzr.kicad_mod",
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"model_3d_plain": "cs4350-czzr-etched.glb",
"model_3d_step": "cs4350-czzr-etched.step",
"model_3d_step_plain": "cs4350-czzr.step",
"lbr": "cs4350-czzr.lbr"
},
"distributor_links": {
"lcsc": "C2667277",
"digikey": "598-2334-2-ND",
"mouser": "777-CS4350-CZZR"
},
"distributor_check": {
"checked_at": "2026-11-05T04:30:05Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": "598-2334-2-ND",
"status": "found",
"lifecycle": "Obsolete"
},
"mouser": {
"pn": "777-CS4350-CZZR",
"status": "found",
"lifecycle": "Obsolete"
}
},
"pins": [
{
"number": "1",
"name": "DIF2(AD1/CDOUT)",
"type": "bidirectional",
"description": "Digital Interface Format bit 2 in stand-alone mode; address bit 1 in I²C mode, or data output in SPI mode."
},
{
"number": "2",
"name": "DEM(AD0/CS)",
"type": "input",
"description": "De-emphasis select for the 15 µs/50 µs filter response at 44.1 kHz sample rates in stand-alone mode; address bit 0 in I²C mode or chip select in SPI mode."
},
{
"number": "3",
"name": "DIF0(SDA/CDIN)",
"type": "bidirectional",
"description": "Digital Interface Format bit 0 in stand-alone mode; serial control data I/O for I²C and data input for SPI."
},
{
"number": "4",
"name": "DIF1(SCL/CCLK)",
"type": "input",
"description": "Digital Interface Format bit 1 in stand-alone mode; serial control port clock input for the control interface."
},
{
"number": "5",
"name": "VLC",
"type": "power_in",
"description": "Positive power for the hardware/software control interface; recommended range 3.14 V to 5.25 V."
},
{
"number": "6",
"name": "VD_FILT",
"type": "power_out",
"description": "Filter connection for the internal voltage regulator."
},
{
"number": "7",
"name": "GND",
"type": "power_in",
"description": "Ground reference."
},
{
"number": "8",
"name": "RMCK",
"type": "output",
"description": "Recovered master clock output derived from LRCK; output frequency depends on VLS."
},
{
"number": "9",
"name": "VLS",
"type": "power_in",
"description": "Positive power for the serial audio interface; recommended range 1.35 V to 5.25 V."
},
{
"number": "10",
"name": "SCLK",
"type": "input",
"description": "Serial bit-clock input for the serial audio interface."
},
{
"number": "11",
"name": "SDIN",
"type": "input",
"description": "Serial audio data input for two's complement serial audio data."
},
{
"number": "12",
"name": "LRCK",
"type": "input",
"description": "Left/right clock input that determines which channel, Left or Right, is active on the serial audio data line."
},
{
"number": "13",
"name": "TSTO",
"type": "unconnected",
"description": "Test output; this pin must be left floating and not connected to any trace or plane."
},
{
"number": "14",
"name": "AOUTA-",
"type": "output",
"description": "Differential analog output (negative leg) for channel A; the full-scale output level is specified in the DAC Analog Characteristics table on page 9."
},
{
"number": "15",
"name": "AOUTA+",
"type": "output",
"description": "Differential analog output (positive leg) for channel A; the full-scale output level is specified in the DAC Analog Characteristics table on page 9."
},
{
"number": "16",
"name": "AMUTEC",
"type": "output",
"description": "Mute control output for channel A, providing control signals for an optional mute circuit."
},
{
"number": "17",
"name": "VBIAS+",
"type": "power_out",
"description": "Positive voltage reference output serving as the positive reference voltage for the internal DAC."
},
{
"number": "18",
"name": "VA",
"type": "power_in",
"description": "Positive analog power supply; recommended range 4.75 V to 5.25 V (5.0 V nominal) or 3.14 V to 3.46 V (3.3 V nominal)."
},
{
"number": "19",
"name": "GND",
"type": "power_in",
"description": "Ground reference."
},
{
"number": "20",
"name": "VQ",
"type": "power_out",
"description": "Filter connection for the internal quiescent voltage, which the datasheet specifies as -0.5•VA VDC."
},
{
"number": "21",
"name": "BMUTEC",
"type": "output",
"description": "Mute control output for channel B, providing control signals for an optional mute circuit."
},
{
"number": "22",
"name": "AOUTB+",
"type": "output",
"description": "Differential analog output (positive leg) for channel B; the full-scale output level is specified in the DAC Analog Characteristics table on page 9."
},
{
"number": "23",
"name": "AOUTB-",
"type": "output",
"description": "Differential analog output (negative leg) for channel B; the full-scale output level is specified in the DAC Analog Characteristics table on page 9."
},
{
"number": "24",
"name": "RST",
"type": "input",
"description": "Reset input; when pulled low, the device powers down and resets all internal registers to their default settings."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: The stand-alone pin table lists DIF0/DIF1/DIF2 TSSOP numbers out of name order (1, 3, 4). I mapped t; These pins are multi-function (stand-alone vs. control-port). Pin types were chosen from the control; The page 7 table prints the VLC TSSOP/QFN numbers as '52'. The pinout drawing on page 6 places VLC a"
],
"pages_sent": 14,
"cost_usd": 0.0961,
"at": "2026-11-05T04:29:50"
},
"datasheet": {
"url": "https://datasheet.lcsc.com/datasheet/pdf/590149d774f20e465ba408700dcf9e1f.pdf",
"pages": 41,
"sha256": "4f7dd59cb055103c",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 24,
"described": 24,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "cs4350-czzr.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6.4,
7.8,
0.97
],
"zmin_mm": 0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "706322f42d9793ebf28d5b80100a68bfa8769998a00b78acadf7af937fc1454f",
"checked": "2026-11-05",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "cs4350-czzr-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6.4,
7.8,
0.97
],
"zmin_mm": 0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "4d4dcd7cfb64d3e3438493b9ba65b2c50ebe5aeb8c941d001da0a63d15788d33",
"checked": "2026-11-05",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
],
"package_dims": {
"package_code": "24L TSSOP (4.4 mm body), MO-153",
"source_page": 38,
"D": {
"nom_mm": 7.8,
"range_mm": [
7.7,
7.9
]
},
"E1": {
"nom_mm": 4.4,
"range_mm": [
4.3,
4.5
]
},
"E": {
"nom_mm": 6.4,
"range_mm": [
6.3,
6.5
]
},
"e": {
"nom_mm": 0.65,
"range_mm": [
null,
null
]
},
"A": {
"nom_mm": 1.1,
"range_mm": [
null,
1.1
]
},
"source": "datasheet package drawing, every number found on its page (extract_pins --task dims)",
"model_check": {
"file": "cs4350-czzr.step",
"verdict": "PASS",
"reasons": [
"height and body within the datasheet's package drawing"
],
"by": "factory/package_fit.py"
}
}
}
}