component
CS4207-CNZR
Public Made by Adomby adom
Cirrus Logic Audio Interface ICs, QFN-48(6x6). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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CS4207-CNZR
Cirrus Logic · Audio Interface ICs · QFN-48(6x6)
CS4207-CNZR from Cirrus Logic, in a QFN-48(6x6). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VL_IF | power_in | Digital supply for the GPIO, S/PDIF and Digital Mic interfaces; VL_IF is specified at 2.97 V to 3.47 V in the Recommended Operating Conditions. |
| 2 | GPIO0/DMIC_SDA1 | bidirectional | General purpose I/O line, or the first digital microphone data input; logic levels are 3.3 V. |
| 3 | VL_HD | power_in | Digital supply for the HD Audio interface, specified at 1.42 V to 3.47 V in the Recommended Operating Conditions. |
| 4 | DMIC_SCL | output | High speed clock output to the digital microphone; its frequency follows BITCLK divided by 8 or 12 depending on ADC sample rate. |
| 5 | SDO | input | Serial data input stream from the HD Audio Bus, with input levels set by VL_HD (1.5 V to 3.3 V). |
| 6 | BITCLK | input | 24 MHz bit clock from the HD Audio Bus, with input levels set by VL_HD (1.5 V to 3.3 V). |
| 7 | DGND | power_in | Ground reference for the internal digital section; AGND = DGND = 0 V. |
| 8 | SDI | bidirectional | Serial data output stream to the HD Audio Bus; SDI output functionality also requires the VA and VL_IF rails at nominal levels. |
| 9 | VD | power_in | Positive power for the internal digital section, specified at 1.42 V to 1.89 V in the Recommended Operating Conditions. |
| 10 | SYNC | input | 48 kHz sync clock from the HD Audio Bus, with input levels set by VL_HD (1.5 V to 3.3 V). |
| 11 | RESET# | input | Reset input; the device enters a low power mode when this pin is driven low. |
| 12 | GPIO1/DMIC_SDA2/SPDIF_OUT2 | bidirectional | General purpose I/O line, second digital microphone data input, or S/PDIF output from the internal S/PDIF transmitter; logic levels are 3.3 V. |
| 13 | SENSE_A | bidirectional | Jack sense detect pin; input levels are specified for 3.3 V to 5.0 V on the VA rail. |
| 14 | GPIO2 | bidirectional | General purpose input or output line; logic levels are 3.3 V. |
| 15 | GPIO3 | bidirectional | General purpose input or output line; logic levels are 3.3 V. |
| 16 | MICBIAS | output | Provides a low noise bias supply for an external microphone; electrical characteristics are in the DC Electrical Characteristics table. |
| 17 | MICIN_L- | input | Microphone input left negative; the full-scale level is specified in the ADC Analog Characteristics table. |
| 18 | MICIN_L+ | input | Microphone input left positive; the full-scale level is specified in the ADC Analog Characteristics table. |
| 19 | MICIN_R+ | input | Microphone input right positive; the full-scale level is specified in the ADC Analog Characteristics table. |
| 20 | MICIN_R- | input | Microphone input right negative; the full-scale level is specified in the ADC Analog Characteristics table. |
| 21 | LINEIN_L+ | input | Analog line input left positive; the full-scale level is specified in the ADC Analog Characteristics table. |
| 22 | LINEIN_C- | input | Analog line input common negative; the full-scale level is specified in the ADC Analog Characteristics table. |
| 23 | LINEIN_R+ | input | Analog line input right positive; the full-scale level is specified in the ADC Analog Characteristics table. |
| 24 | VA_REF | power_in | DAC reference supply, specified at 2.97 V to 5.25 V; it is also the return pin for the VBIAS cap. |
| 25 | VA | power_in | Positive power for the internal analog section, specified at 2.97 V to 5.25 V in the Recommended Operating Conditions. |
| 26 | AGND | power_in | Ground reference for the internal analog section; AGND = 0 V. |
| 27 | VREF+ | power_in | Positive reference voltage output for the internal ADCs. |
| 28 | VCOM | output | Filter connection for the internal quiescent voltage, nominally 0.5•VA with 10 kΩ output impedance. |
| 29 | VBIAS | output | Positive reference voltage output for the internal DACs; recommended capacitor values are on VBIAS. |
| 30 | LINEOUT_L2- | output | Analog audio output, line out 2 left negative; the full-scale output level is specified in the DAC Analog Characteristics table. |
| 31 | LINEOUT_L2+ | output | Analog audio output, line out 2 left positive; the full-scale output level is specified in the DAC Analog Characteristics table. |
| 32 | LINEOUT_R2+ | output | Analog audio output, line out 2 right positive; the full-scale output level is specified in the DAC Analog Characteristics table. |
| 33 | LINEOUT_R2- | output | Analog audio output, line out 2 right negative; the full-scale output level is specified in the DAC Analog Characteristics table. |
| 34 | LINEOUT_L1- | output | Analog audio output, line out 1 left negative; the full-scale output level is specified in the DAC Analog Characteristics table. |
| 35 | LINEOUT_L1+ | output | Analog audio output, line out 1 left positive; the full-scale output level is specified in the DAC Analog Characteristics table. |
| 36 | LINEOUT_R1+ | output | Analog audio output, line out 1 right positive; the full-scale output level is specified in the DAC Analog Characteristics table. |
| 37 | LINEOUT_R1- | output | Analog audio output, line out 1 right negative; the full-scale output level is specified in the DAC Analog Characteristics table. |
| 38 | HPOUT_L | output | Analog headphone output left; the full-scale output level is specified in the DAC Analog Characteristics table. |
| 39 | HPREF | input | Pseudo differential headphone reference input, providing the ground reference for the headphone amplifiers. |
| 40 | HPOUT_R | output | Analog headphone output right; the full-scale output level is specified in the DAC Analog Characteristics table. |
| 41 | VHP_FILT- | output | Inverting charge pump filter connection providing the negative rail for the headphone amplifier; nominal voltage is -0.5•VA_HP. |
| 42 | FLYN | output | Negative node of the inverting charge pump flying capacitor. |
| 43 | FLYC | output | Common node of the step-down and inverting charge pump flying capacitors. |
| 44 | VHP_FILT+ | output | Non-inverting charge pump filter connection providing the positive rail for the headphone amplifier; nominal voltage is 0.5•VA_HP. |
| 45 | FLYP | output | Positive node of the step-down charge pump flying capacitor. |
| 46 | VA_HP | power_in | Positive power for the internal analog headphone section, specified at 2.97 V to 5.25 V in the Recommended Operating Conditions. |
| 47 | SPDIF_IN | input | Input to the internal S/PDIF receiver; logic levels are 3.3 V. |
| 48 | SPDIF_OUT1 | output | Output from the internal S/PDIF transmitter; logic levels are 3.3 V. |
| 49 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Cirrus Logic |
| Package | QFN-48(6x6) |
| Category | Communication Interface Chip/UART/485/232 |
| Pins | 49 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Analog Core | VA | 2.97 | 5.25 | V | 13 | ||
| DAC Reference | VA_REF | 2.97 | 5.25 | V | 13 | ||
| Headphone Amplifier | VA_HP | 2.97 | 5.25 | V | 13 | ||
| Digital Core | VD | 1.42 | 1.89 | V | 13 | ||
| HD Audio Bus Interface | VL_HD | 1.42 | 3.47 | V | 13 | ||
| GPIO, S/PDIF and Digital Mic Interface | VL_IF | 2.97 | 3.47 | V | 13 | ||
| Ambient Temperature | TA | -40 | 85 | °C | Commercial - CNZ | 13 | |
| DC Power Supply Analog Core | VA | -0.3 | 5.5 | V | 13 | ||
| DAC Reference | VA_REF | -0.3 | 5.5 | V | 13 | ||
| Headphone Amplifier | VA_HP | -0.3 | 5.5 | V | 13 | ||
| Digital Core | VD | -0.3 | 3 | V | 13 | ||
| HD Audio Interface | VL_HD | -0.3 | 4 | V | 13 | ||
| GPIO, S/PDIF and Digital Mic Interface | VL_IF | -0.3 | 4 | V | 13 | ||
| Input Current | Iin | -10 | 10 | mA | Any pin except supplies | 13 | |
| Ambient Operating Temperature | TA | -55 | 115 | °C | power applied | 13 | |
| Storage Temperature | Tstg | -65 | 150 | °C | 13 | ||
| Junction to Ambient Thermal Impedance | JA | 24 | °C/W | 4 Layer Board | 146 | ||
| Junction to Case Thermal Impedance | JC | 10 | °C/W | 4 Layer Board | 146 | ||
| Gain Drift | -100 | 100 | ppm/°C | 17 | |||
| AC-Load Resistance (RL) | RL | 16 | ohm | DAC1 headphone output | 17 | ||
| Load Capacitance (CL) | CL | 150 | pF | DAC1 output | 17 | ||
| AC-Load Resistance (RL) | RL | 3 | kohm | DAC2/DAC3 line output | 18 | ||
| Load Capacitance (CL) | CL | 100 | pF | DAC2/DAC3 output | 18 | ||
| Interchannel Gain Mismatch | 0.1 | 0.25 | dB | DAC1 | 17 | ||
| Interchannel Gain Mismatch | 0.1 | 0.25 | dB | DAC2/DAC3 | 18 | ||
| Output Offset Voltage | 2 | 4 | mV | DAC to HPOUT | 17 | ||
| Passband Ripple | -0.09 | 0.17 | dB | 16 | |||
| Stopband Attenuation | 70 | dB | 16 | ||||
| Passband (Frequency Response) to -0.1 dB corner | 0 | 0.4535 | Fs | 16 | |||
| Stopband | 0.6 | Fs | 16 | ||||
| Frequency Response | -0.01 | 0.01 | dB | 10 Hz to 20 kHz | 21 | ||
| Passband to -0.01 dB corner | 0 | 21792 | Hz | 21 | |||
| Passband to -3 dB corner | 0 | 23952 | Hz | 21 | |||
| DMIC_SCL Duty Cycle | 45 | 55 | % | 22 | |||
| DMIC_SCL Rise Time | tr | 10 | ns | 22 | |||
| DMIC_SCL Fall Time | tf | 10 | ns | 22 | |||
| DMIC_SDA Setup Time Before DMIC_SCL Rising Edge | ts(SD-CLKR) | 40 | ns | 22 | |||
| DMIC_SDA Hold Time After DMIC_SCL Rising Edge | th(CLKR-SD) | 5 | ns | 22 | |||
| DMIC_SDA Setup Time Before DMIC_SCL Falling Edge | ts(SD-CLKF) | 40 | ns | 22 | |||
| DMIC_SDA Hold Time After DMIC_SCL Falling Edge | th(CLKF-SD) | 6 | ns | 22 | |||
| BITCLK Period | TCYC | 41.163 | 41.67 | 42.171 | ns | 23 | |
| SDO Setup Time | TSU | 5 | ns | 23 | |||
| SDO Hold Time | TH | 5 | ns | 23 | |||
| Input Leakage Current | Iin | -10 | 10 | µA | 23 | ||
| Input Pin Capacitance | Cin | 7.5 | pF | 23 |
CAD (KiCad official)
- Symbol:
CS4207-CNZR - Footprint:
Package_DFN_QFN:QFN-48-1EP_6x6mm_P0.4mm_EP4.2x4.2mm - 3D model: QFN-48(6x6) (KiCad packages3D, STEP)
- 3D model files:
cs4207-cnzr-etched.step/cs4207-cnzr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cs4207-cnzr.step/cs4207-cnzr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Cirrus Logic datasheet (148 pp, sha256
229b7fd96a5169df, retrieved 2026-10-26, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusoff(skipped (clean text read)), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).