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README

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CS3818EO

CRMICRO · Audio Amplifiers · HTSSOP-28

CS3818EO from CRMICRO, in a HTSSOP-28. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 /SD input Standby logic input with TTL levels up to AVCC; it must be held high during normal operation, pulling it low shuts the outputs off, and it must not be left floating.
2 /FAULT output Open-drain fault output that goes low on a short-circuit or DC-detect fault and is pulled up toward AVCC (VOL max 0.8 V with 100 kΩ pull-up at VCC=18 V); tying it to /SD gives automatic recovery, otherwise the fault latches until PVCC is reset.
3 LINP input Left-channel positive audio input.
4 LINN input Left-channel negative audio input.
5 GAIN0 input Gain-select low bit with TTL logic levels up to AVCC, together with GAIN1 it selects one of four gain settings (20, 26, 32 or 36 dB).
6 GAIN1 input Gain-select high bit with TTL logic levels up to AVCC, together with GAIN0 it selects one of four gain settings (20, 26, 32 or 36 dB).
7 AVCC power_in Analog supply, rated 6.5 V to 26 V (absolute maximum 30 V) and also the logic reference for the TTL inputs.
8 AGND power_in Analog ground, which the datasheet specifies is connected to the heat sink.
9 GVDD power_out High-side gate-drive supply output (5.0 V to 6.8 V, 6.2 V typical at 100 µA load) that also powers the PLIMIT divider.
10 PLIMIT input Power-limit level set by a resistor divider from GVDD to GND (input range -0.3 V to GVDD+0.3 V); connecting it directly to GVDD disables power limiting.
11 RINN input Right-channel negative audio input, limited to -0.3 V to 5.3 V.
12 RINP input Right-channel positive audio input, limited to -0.3 V to 5.3 V.
13 MUTE input Mute logic input with TTL levels up to AVCC; a high level mutes the amplifier, while low or floating allows normal operation.
14 PBTL input Parallel-BTL (mono) mode select; tie high for parallel BTL operation with the input on the right channel and the load across the left and right outputs, or tie to ground for normal BTL.
15 PVCCR power_in Right-channel power supply input, internally connected to the left-channel supply, with a 26 V maximum rating.
16 PVCCR power_in Right-channel power supply input, internally connected to the left-channel supply, with a 26 V maximum rating.
17 BSPR input Bootstrap pin for the right positive high-side output driver.
18 OUTPR output Right positive speaker output.
19 PGND power_in Power ground.
20 OUTNR output Right negative speaker output.
21 BSNR input Bootstrap pin for the right negative high-side output driver.
22 BSNL input Bootstrap pin for the left negative high-side output driver.
23 OUTNL output Left negative speaker output.
24 PGND power_in Power ground.
25 OUTPL output Left positive speaker output.
26 BSPL input Bootstrap pin for the left positive high-side output driver.
27 PVCCL power_in Left-channel power supply input, internally connected to the right-channel supply, with a 26 V maximum rating.
28 PVCCL power_in Left-channel power supply input, internally connected to the right-channel supply, with a 26 V maximum rating.

Key specifications

Parameter Value
Manufacturer CRMICRO
Package HTSSOP-28
Category Amplifiers/Comparators
Pins 29

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
电源电压 PVCC/AVCC (absolute maximum) PVCC/AVCC -0.3 30 V Tamb=25°C 4
输入电压 (/SD,GAIN0,GAIN1,PBTL,/FAULT,MUTE) VIN -0.3 V Tamb=25°C; upper limit printed as VCC+0.3 4
输入电压 PLIMIT VIN -0.3 V Tamb=25°C; upper limit printed as GVDD+0.3 4
输入电压 (RINN, RINP, LINN, LINP) VIN -0.3 5.3 V Tamb=25°C 4
贮存温度 Tstg -65 150 ℃ 4
工作环境温度 Tamb -40 85 ℃ 4
电源电压 VCC (PVCC, AVCC) VCC 6.5 26 V 4
高电平输入电压 VIH 2 V pins /SD, GAIN0, GAIN1, PBTL, MUTE 4
低电平输入电压 VII 0.8 V pins /SD, GAIN0, GAIN1, PBTL, MUTE 4
低电平输出电压 (/FAULT) VOL 0.8 V RPULL-UP=100k, Vcc=18V 4
高电平输入电流 IIH 50 μA V1=2V, Vcc=18V; pins /SD, GAIN0, GAIN1, PBTL 4
低电平输入电流 IIL 5 μA V1=0.8V, Vcc=18V; pins /SD, GAIN0, GAIN1, PBTL 4
工作温度 TA -40 85 ℃ 4
输出失调电压 (VCC=24V) /Vos/ 1.5 15 mV VI=0V, Gain=36dB; TA=25°C, VCC=24V, RL=8Ω 5
栅驱动电压 GVDD (VCC=24V) GVDD 5 6.2 6.8 V IGVDD=100μA; VCC=24V 5
静态电流 (VCC=24V) Icc 40 70 mA /SD=2V, no load, PVCC=24V 5
待机电流 (VCC=24V) Icc(SD) 250 400 μA /SD=0.8V, no load, PVCC=24V 5
增益 G (VCC=24V) G 19 20 21 dB GAIN1=0.8V, GAIN0=0.8V; VCC=24V 5
增益 G (VCC=24V) G 25 26 27 dB GAIN1=0.8V, GAIN0=2V; VCC=24V 5
增益 G (VCC=24V) G 31 32 33 dB GAIN1=2V, GAIN0=0.8V; VCC=24V 5
增益 G (VCC=24V) G 35 36 37 dB GAIN1=2V, GAIN0=2V; VCC=24V 5
输出失调电压 (VCC=12V) /Vos/ 1.5 15 mV VI=0V, Gain=36dB; TA=25°C, VCC=12V, RL=8Ω 5
静态电流 (VCC=12V) Icc 25 50 mA /SD=2V, no load, PVCC=12V 5
栅驱动电压 GVDD (VCC=12V) GVDD 5 6.2 6.8 V IGVDD=2mA; VCC=12V 5
增益 G (VCC=12V) G 19 20 21 dB GAIN1=0.8V, GAIN0=0.8V; VCC=12V 5
增益 G (VCC=12V) G 25 26 27 dB GAIN1=0.8V, GAIN0=2V; VCC=12V 5
增益 G (VCC=12V) G 31 32 33 dB GAIN1=2V, GAIN0=0.8V; VCC=12V 5
增益 G (VCC=12V) G 35 36 37 dB GAIN1=2V, GAIN0=2V; VCC=12V 5
振荡频率 fOSC (VCC=24V) fOSC 200 450 kHz VCC=24V, RL=8Ω 6
振荡频率 fOSC (VCC=12V) fOSC 200 450 kHz VCC=12V, RL=8Ω 6
上管 漏源导通电阻 rDS(on) (VCC=24V table) rDS(on) 240 mΩ VCC=12V, Io=500mA, TJ=25°C 5
下管 漏源导通电阻 rDS(on) (VCC=24V table) rDS(on) 240 mΩ VCC=12V, Io=500mA, TJ=25°C 5
总 漏源导通电阻 rDS(on) (VCC=24V table) rDS(on) 480 mΩ VCC=12V, Io=500mA, TJ=25°C 5
开启时间 (VCC=24V) ton 50 ms /SD=2V 5
关断时间 (VCC=24V) toff 2 μs /SD=0.8V 5
直流检测时间 tDCDET 420 ms V(RINN)=6V, V(RINP)=0V 5
待机电流 (VCC=12V) Icc(SD) 200 μA /SD=0.8V, no load, PVCC=12V 5
上管 漏源导通电阻 rDS(on) (VCC=12V table) rDS(on) 240 mΩ VCC=12V, Io=500mA, TJ=25°C 5
下管 漏源导通电阻 rDS(on) (VCC=12V table) rDS(on) 240 mΩ VCC=12V, Io=500mA, TJ=25°C 5
总 漏源导通电阻 rDS(on) (VCC=12V table) rDS(on) 480 mΩ VCC=12V, Io=500mA, TJ=25°C 5
开启时间 (VCC=12V) ton 50 ms /SD=2V 5
关断时间 (VCC=12V) toff 2 μs /SD=0.8V 5
电源纹波抑制比 kSVR (VCC=24V) kSVR -70 dB 1kHz, 200mVpp ripple, Gain=20dB, input AC-coupled to ground; VCC=24V 6
输出功率 Po (VCC=24V) Po 15 W THD+N=10%, f=1kHz, VCC=16V 6
总失真加噪声 THD+N (VCC=24V) THD+N 0.1 % VCC=16V, f=1kHz, Po=7.5W (half power) 6
输出噪声 Vn (VCC=24V) Vn 65 μV 20~22kHz, with filter, Gain=20dB 6
输出噪声 Vn (VCC=24V, dBV form) Vn -80 dBV 20~22kHz, with filter, Gain=20dB 6
串音 CT (VCC=24V) CT -100 dB Vo=1Vrms, Gain=20dB, f=1kHz 6
信噪比 SNR (VCC=24V) SNR 102 dB Gain=20dB, max output, THD+N<1%, f=1kHz 6
热保护温度 150 ℃ 6
迟滞温度 20 ℃ 6
电源纹波抑制比 kSVR (VCC=12V) kSVR -70 dB 20kHz~1kHz, 200mVpp ripple, Gain=20dB, input AC-coupled to ground; VCC=12V 6
输出功率 Po (VCC=12V) Po 10 W THD+N=10%, f=1kHz, VCC=13V 6
总失真加噪声 THD+N (VCC=12V) THD+N 0.06 % RL=8Ω, f=1kHz, Po=5W (half power) 6
输出噪声 Vn (VCC=12V) Vn 65 μV 20~22kHz, with filter, Gain=20dB 6
输出噪声 Vn (VCC=12V, dBV form) Vn -80 dBV 20~22kHz, with filter, Gain=20dB 6
串音 CT (VCC=12V) CT -100 dB Po=1W, Gain=20dB, f=1kHz 6
信噪比 SNR (VCC=12V) SNR 102 dB Gain=20dB, max output, THD+N<1%, f=1kHz 6
热保护温度 (VCC=12V table) 150 ℃ 6
迟滞温度 (VCC=12V table) 20 ℃ 6

CAD (KiCad official)

  • Symbol: CS3818EO
  • Footprint: Package_SO:TSSOP-28-1EP_4.4x9.7mm_P0.65mm_EP2.85x6.7mm
  • 3D model: HTSSOP-28 (KiCad packages3D, STEP)
  • 3D model files: cs3818eo-etched.step / cs3818eo-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cs3818eo.step / cs3818eo.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: CRMICRO datasheet (12 pp, sha256 bd8f6587b2eedbc5, retrieved 2026-10-21, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF